SUDHAKAR SUBRAMANIAN

Contact no:- 994*******

Email:- acpb75@r.postjobfree.com

OBJECTIVE

Seeking a job as hardware design engineer in a reputed company to utilize

my total knowledge and experience enlarge of company

QUALIFICATION & RESPONSIBILITES

Education qualification:

. PGD in VLSI (2014)

. B.E in ELECTRICAL & ELECTRONICS (2014) with 1st class (CGPA = 7.28).

Scope of Responsibilities:

. Able to frame algorithms in simulink and state flow.

. Able to generate HDL code from the simulink algorithm.

. Good knowledge of VLSI and ELECTRONICS and MICROCONTROLLER.

POSITION DISCRIPTION

Job Post: Trainee Design Engineer

Femto Logic Design, Chennai (2014-present)

Position Responsibilities are:

. Intended products as necessary by engineering projects or consumer

requirement.

. Produced digital circuit design, study and simulation.

. Prepared technical documentation which helps in future to study

further.

TECHINICAL SKILL

. Operating Systems - Win98/NT/2000/XP/VISTA/WIN7/RedHat Linux.

. Languages - C, Verilog, Embedded C.

. Tools - ModelSim, Quartus II, Matlab, Simulink,Stateflow, keil.

. Protocols - I2C, SPI, UART, Ethernet.

EDUCATIONAL PROJECTS

Project 1: Propellor LED.

Brief Overview of Project:

This project comprises of circular display of a string of LEDs.

Using a high speed motor and some mechanical assembly, LED string mounted

on a printed circuit board is duly interfaced to a microcontroller. An

appropriate program while executed drives a pair of single line LEDs in

space multiplexing mode. This displays some message and or a clock timing

taking advantage of persistence of vision of human eye.

Language of Implementation: Embedded C.

Project 2: Streaming of Video Signal in VGA Monitor.

Brief Overview of Project:

This Project comprises video-in controller which provides a simple

interface to the video decoder chip present on the DE2 board. The video

decoder chip, as connected on the DE2 board, accepts the composite

video input through the Video-In jack on the DE2 board. The controller

handles the data transmission and processing which is necessary to obtain

the picture data in a simple format. The chip configuration is handled by

the separate configuration module and displayed through the VGA monitor.

Language of Implementation: Verilog.

Project 3: Storing the frame of data in SDRAM.

Brief Overview of Project:

This project involves storing and retrieving the image in the

SDRAM and displayed in the VGA monitor, The address of the SRDAM is

accessed and appropriate data of

Image frame is stored and retrieved.

Language of Implementation: Verilog.

Project 4: Hardware implementation of ECG Peak detection.

Brief Overview of Project:

This Project intended for implementing Pan Tompkins algorithm to

find the peaks

Of ECG wave and to find the true positive and false positive values.

Language of Implementation: Verilog.

PERSONAL PROFILE

Date of birth : 07th July, 1993.

Permanent Address: 27/38 B Anna Nagar,

Kurinjipadi,

Cuddalore DT,

TamilNadu

607302.

Languages Known : Tamil and English.

DECLARATION

I hereby declare that all details mentioned in this document are true to

the best of my knowledge.

Date: 23-04-2015.

Place: Chennai.

SUDHAKAR SUBRAMANIAN

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