Embedded Engineer

NITISH MIDHA

*** *. *** ******, *** ***, Arlington, TX – 76010 ● 408-***-**** ● ***********@*****.***

EDUCATIONAL QUALIFICATION:

• Masters of Science, Electrical Engineering, The University of Texas at Arlington, GPA 4.0 May

2015

Course work: Embedded Microcontrollers system design, Microprocessor system, Advance Embedded

microcontroller system design, Advance Microprocessor system, Wireless communication, Data

communication, Digital signal processing, Introduction to Microelectromechanical systems (MEMS).

• Bachelor of Technology, Electronics and Communication Engineering, Punjab Technical University,

First Class with Distinction, 75.6%

May 2012

TECHNICAL SKILLS:

• Experienced with Real Time Operating System (RTOS), kernel design and Boot loader.

• In depth knowledge of microprocessor and microcontroller (RISC) architecture and memory virtualization.

• Good at understanding hardware schematics and datasheets.

• Processors / Target Platforms: dsPIC33FJ128MC802 (16 bit), ARM Cortex M4, ATMEL 8051.

• Tools/IDE: MpLab, Xilinx, Visual studio, Xcode, Keil, EAGLE, Code Composer, Microsoft Office.

• Device drivers: UART, SPI, I2C, CAN, PWM, PID, ADC, DAC, DMA, GPIO, Quadrature Encoder, Input

Capture, Output Compare, Graphics LCD, Watchdog, Interrupts, Timer, Flash memory.

• Programming Languages: C, C++, VHDL, Assembly Language, MATLAB and Exposure to Python.

• Communication: RS232, RS485, Zigbee, OSI Layers, TCP/IP, UDP, IPV4, IPV6, Ethernet, 802.11,

Bluetooth.

• Debugging Tool: ICD3.

• Operating System: Windows 7/8, Macintosh OS X.

• Experienced with laboratory equipment’s like oscillator, function generator, multi-meter and soldering.

• Electrical engineering honor society member, IEEE-Eta Kappa Nu (HKN).

• Good communication, leadership, teamwork skills and commitment to error free deliverables.

WORK EXPERIENCE:

Advance Technology: Industrial Trainee (Chandigarh, India) Jan 2012 - June 2012

• VLSI design was studied and implemented using the VHDL language.

• Worked on different modules using FPGA and CPLD.

ACADEMIC PROJECTS:

Design of a preemptive and co-operative real-time operating system

• Implemented kernel functions for context switching, scheduler, semaphore resource management

• Developed system call function to delete a thread

Device controller using DMX512-A protocol with EF1 topology

• Build a controller and device for a timing intensive asynchronous communications interface based on the

DMX512-A protocol with EF1 topology.

• The PC transmitter will accept commands from a PC via an RS-232 interface and will continuously

transmit a serial stream to control up to 512 devices on a RS-485 communication bus.

Engineered a Tennis ball Retriever Robot

• Worked with vision team to recognize and move towards tennis ball and away from the net.

• The project required coordination with different sensors and drive control teams.

Design of 32 bit microprocessor

• Designed a RISC Microprocessor based on Harvard architecture.

• Implemented a full set of ALU & non-ALU instructions using 4 stages pipelining with solutions for

structural, control, and data hazards.

Design of SDRAM controller to interface MT48LC16M4A2 SDRAM with 80386DX microprocessor

• A complete controller solution was designed including Register Transfer Level, State diagrams, row,

column, bank signal generation, data masking, data flow, ready logic, refresh support.

• Optimizing the design so as to minimize the processor waiting time for refresh and auto-refresh functions.

Emulating cache controller to determine the best architecture

• The goal of this project was to determine the best architecture for a cache controller that interfaces a 256KB

cache in a processor having 4GB SDRAM and 64 bit data bus by adding extra code to FFT function.

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