Project Engineer
Resume:
RESUME
PRASANNAKUMAR PATIL E-mail
ID: ***************@*****.***
Electronics & communication Engineer Mobile:
Location:Banglore
CAREER OBJECTIVE
To be associated with a firm, that provides career development
opportunities and contributes in its progress through my knowledge and
skill.
EDUCATIONAL QUALIFICATION
POST GRADUATION: Master of Technology
BRANCH: VLSI and EMBEDDED SYSTEMS
UNDER GRADUATION: Bachelor of Engineering
BRANCH: Electronics and Communication engineering
SL.NO Exam Aggregate Name of the Name of board
(percentage) Institute
1 M-Tech 71.67 JSSATE Visvesvaraya
(2015) Bangalore Technological
University, Belgaum
2. B.E 72.97 KLS's VDRIT Visvesvaraya
(2013) Haliyal Technological
University, Belgaum
3. PUC II 81.5 Jss Science Department of Pre
(2009) 84 ( PCM) college,Dharwad -University
Education,
Bangalore
4. SSLC 92.80 Pavan English Karnataka Secondary
(2007) medium High
School, Dharwad Education
Board
Technical Skills
Programming languages: Verilog HDL, C,C++, java,Basics of Embedded
C.
Tools: CADENCE Virtuoso, XILINX ISE.
Assembly Languages: 8051 Microcontroller (keil).
Operating systems: Operating knowledge of windows xp, windows 7
operating system.
Personal Skills
. Good Communication Skills
. Hard Worker
. Optimistic
. Belief in Self-Confidence and Team Work
ADDITIONAL CERTIFICATION
> PGDEM(Embedded course):- completed PGDEM(embedded course) from
Accel front line pvt ltd banglore
Main highlighted Areas are: java,
android, embedded c
EXTRA CURRICULAR ACTIVITIES
> Attended workshop on embedded system in NITK SURATHKAL
> Participated in the fest AVISHKAR 2010 and 2011 held at VDRIT,
Haliyal.
> Participated in INNOVISION -12 a State Level Fest for the event
Heat (a quiz event) held at KLS's VDRIT, Haliyal in 2012.
> Participated state level paper presentation held at KLS's VDRIT,
Haliyal
> Won first place in demonstration of laws in the fest of AVISHKAR
2012 and 2013 held at VDRIT, Haliyal.
MAJOR PROJECT UNDERTAKEN IN M-Tech (VLSI & EMBEDDED SYSYTEMS)
Project: "An Efficient Steganography Scheme Using Skin Tone Detection
and Discrete Wavelet Transformation"
Duration: 4 months
Team size: 1
Description:
Steganography is a technique used for secret
communication, in which secret information is embedded into a cover medium.
The Secret information may be some text or image or even audio clip and the
cover medium may be some image, audio or some word file. In this paper, we
propose a stenographic scheme for text hiding and logo hiding. We use
Natural Images as cover medium for hiding secret information. Steganography
scheme used in this project is based on skin tone detection. In this scheme
secret information is embedded within skin portion of image. Skin tone
detection is achieved using HSV (Hue, Saturation and Value) color space.
Additionally DWT (Discrete Wavelet Transform) and LSB (Least Significant
Bit) methods are used for embedding of secret information.
MINI PROJECT UNDERTAKEN IN M-Tech (VLSI & EMBEDDED SYSYTEMS)
Project: "DESIGN OF LOW DELAY FULL ADDER USING 180nm TECHONOLGY"
Duration: 1 month
Team size: 1
Description:
The 14T full adder cells proposed in the project
utilizes low power by using pass transistor logic and transmission gate.
The power consumption of 14T is reduced by decreasing the transistor count,
about 50% compared with conventional full adder. The simulation results are
carried out by using cadence tool with 180nm technology at 5v supply
voltages. Simulation results of 1-bit adder cell 14T full adder are
compared with conventional full adder terms of power consumption, area,
time delay and power delay product parameters
PROJECT UNDERTAKEN IN ENGINEERING
Project #1: "PATIENT MONITORING USING WIRELEES TECHNIQUE"
Duration: 4 months
Team size: 4
Description:
The Advance patient monitoring system
involves ASK using wireless technique and this is essential for
monitoring status of patients for Safety and essential condition of the
patient. Monitoring patient activities and bio parameter using manpower
sometimes fails in accuracy and there are chances of negligence. This is
some time risky for patients; hence this system involves some parameters
and features, where less manpower and more accuracy can be achieved.
PERSONAL INFORMATION
Date of birth : 16-07-1991
Father's Name : Guddanna M Patil
Languages Known : English, Hindi and Kannada
Hobbies : Reading books, playing chess, writing poems &
singing
Nationality : Indian
Permanent address : s/o Dr.G M Patil no 46 shri chidambar
nilaya shardha colony
Hukkerikar nagar
Dharwad-580004
Present residential address : c/o D Patil
No 584 shri chidambar jp
nagar 7th phase
Rbi layout 2nd main 3rd
cross
banglore-560078
DECLERATION
I hereby declare that the above written particulars are true
to the best of my knowledge and belief. Given an opportunity to work in
your esteemed organization, I shall put all my effort to live up to your
expectation
Place: Banglore (prasannakumar
patil)
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