VLSI Design
Resume:
CURRICULUM VITAE
Rasneen Kombathiyil
Kombathiyil House
Kannamangalam P.O
Vengara
Malappuram - 676304
Kerala
************@*****.***
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Career Objective:
Work in a dynamic environment with dedication and responsibility, which
allows the pursuit of career advancement and enhance my cognizance and
skills.
Educational Qualifications:
Examinatio Discipline/ School/college Board/ Year of %
n Specializatio University Passing
n
Electronics M.E.S College Calicut 2011 72.9
B. Tech and of University
Communication Engineering,
Engineering. Kuttipuram
H.M.Y.H.S.S Kerala Board 2006 89.67
Plus Two Science + Manjeri of Higher
Maths Stream Secondary
Education
S. S. L.C S.S.C P.P.T.M.Y.H.S. Kerala Board 2004 93
S Cherur of Secondary
Education
Professional Experience
> Assistant system Engineer, Tata Consultancy Services, Bangalore 2012-
2013-campus placement.
Current Position
I am doing my fourth semester Post Graduation in M.Tech VLSI Design under
Calicut University (2013-2015 Batch). I have scored SPGA =7.92 in results
published so far
Computer Skills:
> System Verilog/Verilog
> VHDL
> Programming Language: C, HTML
> Operating Systems: Windows XP
> Office Package: Microsoft Word, Microsoft Excel, and Microsoft
PowerPoint.
Trainings undergone
> 1 week Training on Computer networking in RTTC- Thiruvananthapuram.
> 3 months Training on JAVA in Tata Consultancy Services, Chennai.
> 15 days Training on embedded system(Atmel8051,PIC family,ARM7)in
Keltron Kozhikode.
Seminars
> A low-power, area efficient design technique for wide fan-in domino
logic
based comparators
> Performance analysis of modified QSERL circuit
> Next generation thin film photovoltaics
Academic Projects
Mini Project: Collision prevention system based on SONAR
DESCRIPTION:
Collision prevention system as the name suggests is a device that helps to
detect obstacles that may cause any damage to a system. The circuit makes
use of sonar system to detect the obstacle. The circuit basically consists
of ultrasonic transmitter and receiver linked to a microcontroller. The
circuit is currently being used in modern vehicles having microcontrollers
as parking sensors. It is also a part of distance detectors.
Main Project: Design and implementation of VLSM based IP based network to
have efficient utilization of address space.
DESCRIPTION:
VLSM is a process of dividing a single network in to different smaller
networks as per the requirement of the System Administrator for reducing
IPV4 address wastage and also helps in the effective routing process. This
project is intended to design a VLSM based Data Network and through this
network implementation, an organization, whose branches are located at
remotely different locations, can view as well as transfer information and
data rather than maintaining physical documents in a cost effective manner.
M.Tech Project: Asynchronous Fine-Grain Power-Gated Logic.
DESCRIPTION:
Asynchronous fine-grain power-gated logic (AFPL) is a novel low-power logic
family. Each pipeline stage in the AFPL circuit is comprised of efficient
charge recovery logic (ECRL) gates, which implement the logic function of
the stage, and a handshake controller, which handles handshaking with the
neighboring stages and provides power to the ECRL gates. In the AFPL
circuit, ECRL gates acquire power and become active only when performing
useful computations, and idle ECRL gates are not powered and thus have
negligible leakage power dissipation.
PERSONAL SKILLS:
< Good interpersonal skills, committed, result oriented, hard working with
a quest and zeal to learn new technologies.
< Self-confident, flexible and quick Learner.
< Comprehensive problem solving abilities
Personal Profile:
Name : Rasneen Kombathiyil
Sex : Female
Marital Status : Married
Nationality : Indian
Hobbies : Cooking, Reading
Date of Birth : 25-04-1988
Declaration:
I hereby declare that the above-mentioned information is correct up to my
knowledge and I bear the responsibility for the correctness of the above-
mentioned particulars.
Place:
Date:
(Rasneen Kombathiyil)
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