Md.saeeduddin
Address: Sayali garden, Nagras road,Aundh pune.
Mobile number:996*******
Mail id:**.*******@*****.***
Carrer objective:
Looking forward to work with an organization where people continually expand their capacity
to learn and where new and expansive patterns of thinking are nurtured.
Education:
QUALIFICATION INSTITITUTION/UNIVERSITY YEAR PERCENTAG
OF E
PASSING
PURSUING
--
PGDVLSI CDAC,ACTS,PUNE
B.Tech J.N.T.U, Kakinada 2014 68.91
Intermediate J.A.C, Ranchi 2009 70.4
Matriculation J.A.C, Ranchi 2007 84.0
Project:
• Succeeded in designing a Light-Detecting Autonomous Robot presented at IIT
Kharagpur.
Description: An autonomous Robot which follows light sources with an ability to
distinguish between the dark and the light. We used 3 LDR's as sensors in 3 directions
and dumped the code built in Embedded C into the ATmega8 microcontroller. The robot
was able to move in 3 directions sensing the light source in the respective direction .The
respective LDR is turned on whenever the light source is present/ON.
• Succeded in designing an Automatic Wireless Health Monitoring System useful for
Hospitals as a part of Final Project.
Description: The motive of the project was to monitor the health of the patients
remotely.The monitoring of health was done in the real time. The project consisted of
the IR sensor and Temperature sensor (used for the measuring the pulse and body
temperature of the patient). The pulse data and temperature is fed to the 8051 micro-
controller. The data was processed through the controller using Embedded C coding and
sent through the SMS to the stored mobile number of the doctor.
• PG-Project: Exploring Offloading capability in Zynq7000 using Graphics Processing
Case Study.
Description: We aim to perform case study to explore the capability of using FPGA
fabric available in Zynq7000 to perform offloading of heavy computation, to increase
the overall system throughput and enable embedded arm processor to be used in other
processes like running OS.We propose to take a standard image/video of 3 varying
pixel sizes stored in Block RAM. Further we will take 4 Image Processing algorithms
of varying complexity to apply on these images.
Skills:
• Basic knowledge of C.
• Linux .
• Xilinx Ise tools knowledge.
• Knowledge of Verilog and Vhdl.
• Some knowledge of tools in Xilinx Vivado.
• Digital electronics.
• Verification using QUESTA SIM.
• Designing and verification using SPICE IRSIM.
Extra training skills:
• One month telecom training at BSNL, ARTTC,Ranchi.
• One-month training on Embedded system programming at IGIAT,Visakhapatnam.
Award:
• State Level essay competition winner.
• Ppt presentation winner at college level.
Hobbies:
• Reading scientific magazine.
• Listen music.
• Playing cricket.