Software Engineer Training

SweetyPinjani

CAREER OBJECTIVE:

Contribute in R & D for the growth of organization.

WORK EXPERIENCE:

• Working as an intern in PTC since 25th July 2014.

• Worked as a Software Engineer in Tech Mahindra from 17 th June 2011 to 31st July 2013.

ACADEMIC QUALIFICATIONS:

Course University/Board % of marks Year of Passing

M.E. (VLSI & EMBEDDED

Pune University 8.68(SGPA) 2015 (Expected)

SYSTEMS)

B.E(E.C.E) Amravati University 75.86 2011

H.S.C. Maharashtra Board 87.50 2007

S.S.C Maharashtra Board 84.53 2005

TECHNICAL SPECIFICATIONS:

OS Windows, Unix, Linux

Tools Xilinx, ModelSim, Microwind, Eclipse, OracleXE

HDL Verilog, VHDL

Database Oracle, SQL, PL-SQL

Web Development Java, Struts 2.0, Hibernate

Software C, C++

Languages

PROJECTS DONE:

CACHE CONTROLLER WITH ENHANCED FEATURES USING VERILOG HDL

(M.E. Final Year)

Design cache controller with Read Write Partitioning cache replacement policy to

enhance the overall system performance. A distinguishing feature of this approach is that it

distinguishing between the criticality of read and writes requests .This cache can be used for

various block size with various ways and can give multiple bit output. As the instruction

cycle required for accessing cache is 1 cycle, performance is drastically improved if the

cache hit ratio is maximized. The results obtained are compared with LRU, LRU, etc. The hit

ratio obtained is better than all these policies.

SOLAR CHARGE CONTROLLER USING PWM (B.E. Final Year)

Design a solar charge controller for enhancing the battery life as well as performance

using PWM technique. Main features include lead acid and SLA Charging, Cyclic and float

charging, optional absorption phase and charging up to 10 A rating. Also, there are LEDs

used for various indications. It cuts off the charging as soon as the battery reaches maximum

voltage in order to prevent any overcharging. Thus, it also helps in improving the battery life.

TRAFFIC LIGHT CONTROLLER USING VERILOG HDL

Design a traffic light controller for a 4 way road using Verilog HDL. Use FSM to

decide the states and the signal on each way. Use different outputs for different signals like

RED, GREEN, and YELLOW.

VENDING MACHINE USING VERILOG HDL

Design a Vending Machine for Tea & Coffee using Verilog HDL. Checking the coins

inserted. Delivering the required drink if the required amount is inserted and a cup is sensed.

ACHIEVEMENTS &EXTRA – CURRICULAR ACTIVITIES:

• Received a certificate of honour for Topper of the batch during Tech Mahindra Training.

• Received a certificate for best team in Java & Database in Tech Mahindra Training.

• Received Gold Medal and Certificate for securing 3rd rank at University level in B.E.

• Received Scholars Award 2008-2009.

STRENGTHS:

• Adaptability to new things.

• Good organisation skills.

• Ability to meet deadlines.

• Competitiveness.

PERSONAL PROFILE:

Name : SweetyPinjani

Languages Known : English, Hindi, Marathi& Sindhi.

Hobbies : Swimming, Guitar, Reading Novels.

Contact no. : +91-808*******

Email : *************@*****.***

Permanent Address : Rampuri Camp, Amravati – 444603.

DECLARATION:

I hereby declare that the above-submitted information is true to the best of my knowledge.

Place:

Date:

PinjaniSweety

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