Mayank Patel
Email: ********@*****.***
Erie, CO 80516
PH#224-***-****
1
OBJECTIVE:
Attain an engineering position with opportunities for Digital
Hardware/Firmware Design Engineer. Utilize my experience in advanced
FPGA based design to provide me with challenges and a growth
opportunity.
EDUCATION:
Bachelor of Science in Electrical Engineering - May 2005
Northern Illinois University, DeKalb, IL
Associates in Engineering
Oakton Community College, Des Plaines, IL
US Citizen
Skills and Experience Highlights:
High Speed digital hardware design, FPGA based system, Xilinx 7-series,
Zynq Soc, Altera and Lettice FPGAs and SoC, Xilinx FPGA system desing using
ISE/Vivado, Altera's QuartusII, Verilog and VHDL coding, ModelSim for HDL
simulator, Xilinx/Altera SDK C programing, OrCad/Mentor Graphics/Altium
schematics design tools, OrCAD PCB SI, HyperLynx SI tool.
EXPERIENCE:
Staff Digital Hardware Engineer -R&D Boulder, CO
Covidien (May 2012. - Present)
Kelly Services contract at Covidien (Sep 2011. - May 2012)
. Most recent design project: Design HPC(High Performance Comp) Xilinx
ZYNQ SoC system with DDR3, eMMC, QSPI, USB, GigE, I2C, SPI etc.
. Digital hardware design with FPGA/CPLD based system
. Architecture design for Digital hardware/firmware system
. Run pre/post PCB SI simulation for high-speed design
. Design FPGA/CPLD RTL in Verilog code
. Design complex digital power sequence for FPGA and embedded system
with Lattice CPLD
. Design digital power supply circuit for Xilinx FPGA/CPLD (Zynq,
Spartan-6, Kintix-7 etc)
. Designing Xilinx Spartan-6 and Kintex 7 based FPGA logic board.
. Design and implement PCIe, SPI, USB 2.0, I2C, UART, RS232, DDR3, High
speed ADC/DAC interface etc.
. Using ISE/Vivado and EDK system crate Microblaze processor and Verilog
RTL
. Write hardware bring-up test
. Generate various design review documents (i.e PCB layout spec, theory
of operation, design I/O requirements, OrCAD schematic, design
simulation etc)
. Manage Jr Engineers, Technician and summer interns
. Wire Hardware Requirements in Doors and create Hardware specification
to test with DVT
Hardware Design Engineer, (Nov 2009. - Sep 2011 )
GFI Genfare (AN SPX DIVISON) Elk Grove Village, IL
Main responsibility includes hardware design and analysis of the Fare
collection system and subsystem/circuits to the specification, cost,
schedule and testing and quality goals
. Hardware design with FPGA/CPLD, Embedded microprocessor, supporting
power circuit, memory interface, data transfer interface
. Xilinx Spartan-6 FPGA based hardware design with softcore IP
peripherals i.e. SPI, I2C, RS232/RS485, CAN, USB 2.0 host
controller, TFT controller, 10/100 EMAC, LVDS display SERDES, AC'97
audio and touch screen interface etc.
. System memory design: DDR/DDR2 SDRAM, SPI Flash, NOR/NAND Flash, I2C
EEPROM etc.
. Xilinx EDK/SDK design for MicroBlaze system
. Design IR LED(optical) data port probing system(bidirectional serial
data transfer), IR sensor board, IrDA Tx/Rx interface, RGB LED drivers
(TI i2c driver)
. Embedded system design: I.MX27 ARM9 based hardware design and system
test
. Power management circuit design for FPGA and microcontroller based
system
. Firmware design includes writing VHDL code for FPGA logic and VHDL
testbanch testing
. Design Test and Debug design uisng Xilinx ISE, ISEsim and ChipScop Pro
. Prototype testing with lab test equipment (e.g. function generator,
scope (DSO), logic analyzer, DMM etc.)
. Use Altium designer for Schematic entry and PCB layout.
. Write Test C/ C++ application in SDK for MicroBlase soft core
. Linux/RTOS kernel loading and write C/C++ code for embedded processor
system
. Generate documentation e.g Hardware drawing, wiring diagram for
cables, system block diagram, production test procedure etc.
. Part selection and make contacts with various vendors and FAE for
technical help
. Provide engineering support on technical issues with customer's
boards
. Travel to various customer's site for engineering support and survey
Electronics Engineer, (June 2009 - October 2009)
Northrop Grumman, Rolling Meadows, IL
(Contract from Kelly Engineering)
. Worked on small FPGA design project based on Xilinx Spartan-3E with
MicroBlaze soft core.
. Write VHDL/Verilog HDL coding and Testbanch simulation(ModleSim) .
. Worked on Aero-Defense electronics products (CCA cards) for Digital
Circuit Design group.
. Performed Design-Try-Out (DTO) in Lab Environment on various for
Digital/ Analog and high frequency circuits which include FPGA, CPLD,
DDR, EEPROM, Flash Memory, ADC/DAC, Drivers, Interface, Clock Buffers,
Operational Amplifiers, Buffer Circuits, MOSFET, BJT, Diodes,
Temperature Sensors, and ASCI Heaters
. Performed research and selection of Digital/Analog part to create bill
of metrical (BOM)
. Contacting semiconductor part manufacturer and broker
. Write ECOs for Digital and Analog circuit boards.
Hardware Engineer, (Dec 2006- May 2009)
1 Teradyne, Inc (formally Eagle Test System), Buffalo Grove, IL
. Design, layout and schematic drawing using DxDesigner/Cadence OrCAD
tools for prototype, production and replacement/alternate circuit
modules for Digital/ Analog circuit
. Performed Analog circuit simulation using Pspice and LTspice(Linear
Tech)
. Performed hardware upgrade on Digital/Analog circuit boards and
replacement of obsolete and End-of-Life devices with equivalent
devices
Lab Testing and Debugging on prototype/ production circuit boards which
involves Op-Amps, FET, BJT, power management devices, DAC, ADC, Level
Translators, memory interface and active and RC filter circuits
. Modified and Redesigned Logic Circuits using FPGA and CPLD Cores to
enhance performance (Xilinx, Lattice, Altera, etc.). This includes
implementation and simulation of VHDL Coding using CAD simulation
tools (Active-HDL 7.2, ModelSim, Xilinx ISE Simulator, etc.)
. Write VHDL/Verilog HDL coding and Testbanch simulation(Active-HDL)
. Worked with digital data transfer protocol i.e I2C, SPI, UART
(RS232), PCI, SMbus etc
Implemented and validated various Eagle Test products through writing
test program using visual C++
. Sustained and Supported ATE tester used for ATE tester and its
resources.
. Write ECOs for Digital, analog circuit boards.
. Test, Repair and Troubleshoot Analog, digital and FR resources for
Automatic Tester (ATE).
. Professional Soldering experience (IPC certified).
. Review diagnostic and calibration log files to determine the source of
the problem.
. Assist in hardware/software products to digital, analog and
application engineering groups.
Associate Engineer, (June 2005 - November 2006)
Underwrites Laboratories Inc, Northbrook IL
. Managed Daily Engineering Projects.
. Performed analysis of project scope, determined valid project
specifications, and established test programs for product
investigations per UL standards. (Power Distribution).
. Worked with following categories: Power supply (Linear, Switch Mode,
and Low-Power Class 2 Type etc.), Battery charger (direct Plug-In to
high power industrial battery charger), photoelectric sensor switch,
UPS and Transformer.
TECHNICAL SKILLS:
. FPGA/CPLD HDL design with VHDL/Verilog
. FPGA/CPLD design verification using VHDL Testbench and System C.
. Soft Processor: MicroBlaze, PicoBlaze, PowerPC, Nios II etc.
. Working experience with Embedded processor which includes 8-bit
68HC11 microcontroller, Freescale I.MX Family and equivalent ARM
based 16/32-bit microcontroller.
. Hands-on laboratory experience with UL compliance testing on power
electronics
. Immediate experience on DMM, Oscilloscopes, waveform generator,
Logic Analyzer, Power Analyzer
. IPC certified professional soldering experience
. Component level circuit board debugging, testing and repair skill
. Experience with MS share, MS visual studio express, point, SAP
inventory tool
Engineering tool skills:
. DxDesigner & PADS PCB Layout (Mentor Graphics) and Altium Designer
. SI verifaction with HyperLynx
. ModelSim, Active-HDL, Symplify for FPGA design verification tools.
. FPGA design tool: Xilinx ISE & EDK, Lattice Diamond and Altera's
Quartus II
. Eclipse based SDK IDE for Xilinx, Alter and Lattice
. Xilinx ChipScop Pro and Lattice ispTRACY Logic Analyzer LTspice,
PSpice