CURRICULUM VITAE
SAHITHI.M, EMAIL:************@*****.***
Objective:
To pursue challenging, high caliber career through a reputed
organization where there is enough thrust for teamwork and innovation. To
explore the level of mind towards the objective oriented tough tasks
through team work.
Educational Qualifications:
Examination Branch Institution Board/ Year of %
University Passing
M.Tech Very Large Koneru Lakshmai K.L.U, 2012
Scale University Vaddeswaram,G
Integration untur dist,
AP 8.93
B.Tech Electronics & Lakireddy Bali J.N.T.U, 2010 68.7
Instrumentati Reddy College of Kakinada.
on Engineering,
Engineering Mylavaram.
Intermediat Mathematics, Sri Chaitanya Co-Op Board of 2006 83.7
e Physics & Jr Mahila Kalasala intermediate
Chemistry education,
Hyderabad.
S.S.C Gowtham Public State Board 2004 82.5
school of Secondary
Education
Communication skills:
Languages Known: English, Telugu
Software skills:
Languages : VHDL
Technical knowledge:
> Digital System Testing And Design For Testability
> Low Power VLSI
Co-curricular activities:
> Awarded Silver Medal for my achievement in Master of Technology
(VLSI).
> Published an International Journal on "Highly Accelerated Advanced
Multiplier Design for An Efficient Bandwidth Utilized FFT Computation"
in International Journal of Computer Science and Information
Technologies, Vol. 3 (1), 2012, 2957 - 2963(IJCSIT).
> Published an International Journal on "Efficient Utilization of Time
for Fast Multipliers Using Twin Precision Technique in DSP" in
International Journal of VLSI and Signal Processing Applications,
> Participated in International Conference on "INTERCONNECT-CENTRIC
DESIGN FOR ADVANCED SYSTEM-ON-CHIP & NETWORK-ON-CHIP" at S.A
ENGINEERING College, CHENNAI
> Won first prize for paper presentation on "CYBER KNIFE"at MEDHA MILAN-
10 conducted in SHRI VISHNU ENGINEERING COLLEGE FOR WOMEN.
Main project:
Title: Highly Accelerated Advanced Multiplier Design for an Efficient
Bandwidth Utilized FFT Computation
Description: Multiplication is a complex arithmetic operation, which is
reflected in its relatively high signal propagation delay, high power
dissipation, and large area requirement. When choosing a multiplier for a
digital system, the bit-width of the multiplier is required to be at least
as wide as the largest operand of the applications that are to be executed
on that digital system. The bit-width of the multiplier is, therefore,
often much larger than the data represented inside the operands, which
leads to unnecessarily high power dissipation and unnecessary long delay.
This resource waste could partially be remedied by having several
multipliers, each with a specific bit-width, and use the particular
multiplier with the smallest bit-width that is large enough to accommodate
the current multiplication. Such a scheme would assure that a
multiplication would be computed on a multiplier that has been optimized in
terms of power and delay for that specific bit-width. However, using
several multipliers with different bit-widths would not be an efficient
solution, mainly because of the huge area overhead.
We present the twin-precision technique for integer multipliers in
FFT (Fast Fourier Transforms) applications. The twin-precision technique
can reduce the power dissipation by adapting a multiplier to the bit-width
of the operands being computed. The technique also enables an increased
computational throughput, by allowing several narrow-width operations to be
computed in parallel. It describe how to apply the twin-precision technique
also to signed multiplier schemes, such as Baugh-Wooly and modified-Booth
multipliers.
Team size : 1
Duration : 6 Months
Strengths:
> Very quick learner
> A positive attitude and total belief in my capabilities.
> Good Listening Ability and Patience.
> Ability to work comfortably in a group
Personal Details:
Name : M.SAHITHI
Sex : Female
Date of Birth : 16 July, 1989
Father's name : M. Ramanadha Rao
Marital Status : Married
Languages Known : English, Telugu
Mobile number : 971*******
Declaration
I hereby declare that all the information presented above is true to the
best of my knowledge.
Yours Sincerely
(M.SAHITHI)