Engineering

Venkatachalam K Phone: +91-887*******

*/***,************, ***** **: ****************@*****.***

Thouthipalayam(po),

Tiruchengode (tk),

Namakkal -637503

Career Objective:

I aspire to become an integral part of an organization offering me ample

opportunities for professional growth and positive work atmosphere. I want

to utilize my optimum potential and be an asset to the organization I work

for.

Educational Qualifications:

Course/Board Institute/School Aggregate

Master of Engineering in K S R Institute for 7.94%

Embedded System Engineering and Technology, (CGPA)

Technologies(2012-2014) Thiruchengode (TamilNadu)

Anna University-Chennai

Bachelor of Electronics and Paavai Engineering College, 7.33%

Communication Engineering Namakkal (TamilNadu) (CGPA)

(2008-2012)

Anna University - Chennai

Higher Secondary Course Shri Vinayaga Hr.Sec School 81.7 %

Examination (2008), Morepalayam (TamilNadu)

HSC

Secondary School Shri Vinayaga Hr.Sec School 88 %

Examination (2006), Morepalayam (TamilNadu)

Technical Skills:

Languages C, C++, VHDL., Assembly Programming

OS Windows,

Software's Model Sim, Xilinx, and NS2

Area of Interest Microcontroller based system design, Real time

operating system, Digital signal processing and keen

towards learning new technologies.

Projects:

Major project

Implementation of Enhanced Carry Select Adder with an Efficient Design

Metrics:

The objective of the project is to develop a design to minimize the Area,

Power and Delay in FIR filter. Digital Finite Impulse Response (FIR)

filters are frequently used in most DSP system by virtue of stability and

easy implementation. FIR filter is a major determinant of the performance

and power consumption of the whole system, which includes multipliers and

adders as its major components. The delay encountered in carry propagation

of adders is enormous thereby leading to more power consumption and also

area increase is pronounced when the length of FIR filter is large. The

proposed Enhanced Carry Select Adder (ECSLA) uses Ladner Fischer (LF) adder

instead of RCA with in the regular CSLA to achieve lower area and power

consumption.

Technology Used: FIR filter implemented using Xilinx-FPGA kit.

DECEMBER 2013

Extended Routing Algorithm In Wireless Sensor Networks:

The congestion problem in Wireless Sensor Networks (WSNs) is quite

different from that in traditional networks. Most current congestion

control algorithms try to alleviate the congestion by reducing the rate at

which the source nodes inject packets into the network. However, this

traffic control scheme always decreases the throughput so as to violate

fidelity level required by the applications. In this project, we present a

solution that sufficiently exerts the idle or under loaded nodes to

alleviate congestion and improve the overall throughput in WSNs.

Technology Used: TADR Algorithm

NOVEMBER 2010

Strengths:

. Strong Presentation Skills

. Immense Interest in Analysis

. Good Team Player and Interaction Skills to coordinate and work within

a team

. Dedicated

. Gregarious

. Positive Attitude

. Hard working

Hobbies:

. Internet Surfing

. Travelling

Conference Details

V Attended National Conference in United Institute of Technology and

presented paper on Implementation of Enhanced Carry Select Adder with

an Efficient Design Metrics.

V Attended National Conference in Institute of Road and Transport

Technology and presented paper on An Area efficient Enhanced Carry

Select Adder for Low power Application

V Participated National Conference in Gnanamani college of technology

and presented paper on An Area efficient Enhanced Carry Select Adder

for low power application

V Participated National Conference in KSR Institute for Engineering and

technology and presented paper on Implementation of Enhanced Carry

Select Adder with an Efficient Design Metrics.

Achievements:

> Attended Hands on Training in VLSI DESIGN USING TANNER EDA & MENTOR

GRAPHICS TOOLs( 2013).

> Worked as an active member in organizing Faculty Development Program

at KSRIET.

> Worked as committee leader of VIBRANTZ (a student association for

ECE Department).

> Organized and Coordinated "Industrial Visit trip to Ooty" for my

class.

> Organized various events in National Level Technical Symposiums for

my college.

Personal Profile:

Name : Venkatachalam. K

Date of Birth : 5th, May 1991

Father's Name : Kandasamy. B

Address : 3/140,koothanatham, Thouthipalayam(Po),

Tiruchengode (Tk), Namakkal -637503.

Nationality : Indian

Ph No. : 91-887*******

Languages Known : Tamil, English

Declaration:

I hereby declare that the details mentioned above are all true to the best

of my knowledge.

Place: NAMAKKAL

Date: 12-11-2014

Signature:

Contact this candidate