Project High School
Resume:
DAYASHANKAR SRINIVASAN
#** *** ******, ******** *****,
*********@*****.***
Perambur, Chennai-600011 TN, India. +91
Experience: 2Years
Career Objective:
To achieve a challenging position with a growth oriented company that
value high performance, professionalism and growth enhancement, where I can
grow along with the organization with great responsibility.
Present Employment Profile:
Society for Applied Microwave Electronic Engineering and Research -
Centre for Electro Magnetics - SAMEER CEM (GOVT OF INDIA), Chennai-113
Designation:
Research Scientist- Electronics DSP Division (Dec 2012 to till
date)
Experience Summary:
Design and Development
V Experience in RTL Design using VHDL for FPGA based implementation in
base band module (Xilinx SPARTAN 6).
V Development of GUI Applications using LAB Windows CVI from National
Instruments under 'C' platform for RS-232/485 based communication
project.
V Developing Matlab modules for estimation, Evaluation of received data
from Hardware board.
Testing and Debugging
V Analysing signals using Mixed Signal Oscilloscope and Logic Analyzers.
V Writing Test bench for the Functional and timing Verification using
behavioral and post-route simulation, Debug the code using Chip-Scope,
on-chip debug tool.
V Verifying the Baseband module function using FPGA based hardware
module.
Professional Training & Certification
V Embedded system Design at NIELIT (Govt of India) Chennai.
V FPGA based Design at NIELIT (Govt of India) Chennai.
TECHNICAL EXPERTISE:
DOMAIN FPGA
Languages Worked VHDL, C, MATLAB, EMBEDDED C
Known VERILOG
Programming Tools Used Xilinx-ISE, KEIL micro V4, MATLAB, NI-LABWINDOWS.
EDA Tool Used MODELSIM
Hardware board Used AOFDM_BASEBAND ( Using Xilinx Spartan-6), VIRTEX
6 (ML605)
Communication Protocols UART, ETHERNET,I2C
Knowledge RTL Design, Simulation, Debugging, GUI Design,
Firmware Development, 8051 MICROCONTROLLER and
ARM 7.
JOB PROFILE:
PREVIOUS PROJECT : OFDM (Wireless Communication Project for High Data
Rate)
Client : DIT
Responsibilities :
FPGA based implementation, RTL coding
(VHDL), simulation, synthesis and integration of base band section, for
Both transmitter and receiver section modules, RS232, message-decoder (8
bit), de-mapper (16 bit) etc,
Includes Post Route verification and timing analysis in the
Hardware board AOFDM_BASEBAND using (Xilinx - Spartan 6) for Orthogonal
Frequency Division Multiplexing (OFDM) Project, Base Band Module. Developed
GUI in 'C' language NI LAB-WINDOWS CVI tool with RS232 based communication
protocol. Developed Bit error rate (BER) and signal to noise ratio (SNR)
module in Matlab.
PRESENT PROJECT : TWT (CDMA)
Client : DRDO
Responsibilities :
Implementing Soft Core Embedded Processor
in Kintex-7 FPGA for Ethernet Communication using UDP PROTOCOL as well as
RS 232/485 to baseband section using Xilinx-ISE. Ethernet Communication
between PC to FPGA and vice versa using NI LAB-WINDOWS CVI.
EDUCATIONAL QUALIFICATION
Qualification Name of the Institution Percentage / Pass out
CGPA Year
B.E in ECE Anand institute of higher
technology, Anna University, 7.13 2012
Chennai.
Diploma in ECE Murugappa Polytechnic College,
Chennai. 90.94 % 2009
Certificate Course in MATRIX Technical Training
Mechatronics Centre, Sholinghur. 70 % 2005
SSLC Railway Mixed High School,
Arakkonam. 77.6% 2003
PERSONAL STRENGTH
V Team player, Positive Attitude, Sincerity.
LANGUAGES KNOWN
V English (R/W/S), Tamil (R/W/S), Hindi (R/W/S), Telugu (s).
Personal Profile
Date of Birth : 04.04.1988
Gender : Male
Marital Status : Single
Nationality : Indian
Alternate Email :
*************@*****.***
Alternate / Father Contact Number : 948-***-****
I hereby declare that the above mentioned and facts stated herein
above are true, correct and complete to the best of my knowledge and
belief.
(Dayashankar.S)
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