Project C

RESUME

Name: Jeevan Reddy Mandali, Date of Birth: 30.07.1990

Contact: +91-903*******

Address: MIG-93/2, H.B.Colony, Bhavanipuram, Vijayawada - 520012.

Email: ******************@*****.***

Blog: http://weloveubuntu.wordpress.com/

Objective:

Seeking a challenging and rewarding opportunity in software field in an

organization of repute which recognizes and utilizes my true potential

while nurturing my technical skills.

Education:

Qualification Board/University Year of Percentage/CGP

Passing A

Master of Technology, GITAM University, 2014 8.70/10

Embedded Systems Vishakhapatnam

B.Tech, Electronics & Amrita Sai Institute of 2011 68.60%

Communication Science and Technology,

Engineering Vijayawada

10+2, MPC Sri Chaitanya Junior 2007 89.80%

College, Vijayawada

S.S.C Sir Arthur Cotton High 2005 84.20%

school, Vijayawada

Technical skills:

Programming Languages Strong in C, strong fundamentals in DS, Linux and RTOS

programming

Operating Systems Windows, Linux, VxWorks

Tools GDB debugger, SDLC, Valgrind, Tornado 2.0, Visual

studio 6.0, Xilinx XPS

Concepts Multi-threading, Makefiles, Inter Task Communication,

Socket programming

Protocols TCP/IP, Aurora

Key Projects Undertaken:

1. IMPLEMENTATION OF HIGH-SPEED SERIAL DATA TRANSMISSION MODULE USING

AURORA PROTOCOL

Environment: C, Embedded C

Duration: 1 year

Tools used: Xilinx XPS, CORE Generator

Team size: 1

Detail: This FPGA based Defense project aims at alleviating undesired

analog effects such as crosstalk, ground bounce, reflections and clock skew

suffered by parallel buses and transmit data serially at high rates like

3.125 Gbps. This approach also reduces number of physical wires required

for connection between two devices and avoiding the sharing of bandwidth

between multiple targets hosted by a host. The project is done using multi-

gigabit serial I/O, configured using Aurora protocol carried out on a

Virtex-5 FPGA. This module is used by the DLRL in their recently launched

project.

2. SOCKET PROGRAMMING BETWEEN VIRTEX-5 AND PC USING TCP/IP

Environment: Embedded C, C

Duration: 1 year Tools used: Xilinx XPS, SDK,

Visual Studio Team size:

2

Detail: This real time Defense project aims at establishing connection

between a PC and a FPGA using TCP/IP and later communicate. First a GUI is

designed using Visual Studio, which is used to send commands to the

embedded board and then an Embedded C program is written for the FPGA to

receive, decode and act according to the commands. This module is used by

the DLRL in their recently launched project.

Industrial and Research Experience:

. A full time 1 year industrial cum research experience in Defense

electronics and Research Laboratory.

Career Achievements:

. Published a paper on "Implementation of High-Speed Serial I/O over

Dual independent Aurora Lanes/Channels of same GTX Dual Tile using

Aurora Protocol" in International Journal of Thesis Projects and

Dissertations (IJTPD).

Personal Dossier:

1. Gender : Male

2. Hobbies : Internet browsing, reading books, writing

articles, open source

3. Nationality : Indian

4. Languages : English, Telugu, Hindi

5. Excellent communication and interpersonal skills, self-learning,

commitment to deadlines

Station: Bangalore

Date:

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