Hemal Nayak
Z-*,sakal apt, naranpura ***********@*****.**.**
ahmedabad-13 +91-903*******
Summary:
In depth knowledge as well as hands on experience in Asic Design Engineering
through M.E. specialization in VLSI.
Experience in Hardware circuit design, Testing, Verification, Scripting and
Programming.
Research Experience, Gujarat Technological University, Ahmadabad : 2012-13
Project under taken in SEER Academy, Hyderabad
Cordic core with High throughput using 90nm SAED technology
Designed Co-ordinate Rotation Digital Computer that is faster, simpler, efficient than
conventional DSP Processor.
It uses unique computing technique for solving trigonometric relations and elementary functions
using minimal hardware such as shift, add/sub compare.
Used Synopsys tool chain to perform this project from RTL to GDS-II form
Design and synthesize the cache controller
Designed cache controller Verilog RTL for 1KB fully associative write back buffer cache.
Used Synopsys tool chain for simulation, Verification and Synthesization.
Used system verilog test bench with multiple assertions for proper verification.
Work Experience:
L.D. COLLEGE OF ENGINEERING, Ahmedabad, Lecturer (On Contract) Jan-2014-Present
Expertise knowledge in VLSI and Embedded System, Additional knowledge in digital logic
design, basic and Power electronics.
Delivering lectures and performing lab of all these subjects.
Depth knowledge of Xilinx, Altera, keil, orcad capture, Synopsys tool Suit.
SYSTRONICS INDIA PVT LTD, Naroda, Ahmedabad, Hardware Testing Engineer 2009-2011
Company Profile:
Manufacturer of Analytical & scientific instruments.
Manufacturer of Pharmaceutical & clinical instruments.
Job Profile:
Troubleshooting problem, Hardware testing & analysis, find the circuit flowing path.
Test Conductivity/PH meter & calculate accurate reading.
Test visible Spectrophotometer which uses to measure the chemical sample.
Education:
Master of Engineering (E&C)-VLSI & Embedded System Design 2011-2013
Gujarat technological University, Ahmedabad, Gujarat
Bachelor of Engineering (E&C) 2005-2009
Sardar Patel University, Aanand, Gujarat
Technical Skill Set:
Hardware/software Languages: Verilog, VHDL, System verilog
Synopsys Tool Suit: VCS, Design Compiler, IC Compiler, DFT Compiler, Custom Designer
Simulators: Pspice, Hspice, ModelSim, Multi Sim,
Other Tools: Matlab, Altera Max Plus-II, Quartus-II, Xilinx
Programming and Scripting: Perl, TCL, C, CPP, Assembly Language
Protocols: I2C, USB, CAN, AMBA, PCI, Ethernet
Operating System: Linux, Windows
Applications: Entire Microsoft Suit
Paper Publication:
Published research paper on Cordic core with high throughput using 90nm SAED
technology GRIN publication limited, Germany on 23rd April, 2012
Workshop/Seminar:
Participated in Workshop on Emerging Trends in VLSI Design Methodology, Solutions
& Opportunities.
Nonlinear and Variable Structure Control System.
One Day Workshop on VLSI Design & Software Utility.
Achievement:
Qualified GATE (Graduate Aptitude Test) -2011 With 89 Percentile
Strength:
Good interpersonal skills and communication skills,
Innovative approach and Quick adaptability to changing processes and trends.
Personal Detail:
NAME: Hemal Dineshkumar Nayak
ADDRESS: Z -5, Sakal Apt., Op. Naranpura Post Office,
Naranpura, Ahmedabad-380013.
BIRTH DATE: 09/12/1987
MOBILE NO: +91-903*******;
HOME NO: (079-********