Verilog programming. Modelsim, Xilinx ISE, planAhead, SDK

D. SHANMUGA PRIYA Local Address:

No:**, Nagalinga Nadar Street AM5, MM Women’s Hostel,

Aruppukottai-626101 Anna Nagar West, 12th Main Road,

Mobile No: +91-960******* Chennai-40

e-Mail ID: ***********@*****.***

OBJECTIVES

To work in an environment where learning is a continuous process, to impart new skills and get trained with the latest of technologies, contributing to the organization’s success as well as for my growth and career development.

ACADEMIC PROFICIENCY

COURSE

INSTITUTION NAME

BOARD/UNIVERSITY

MONTH AND YEAR OF PASSING

PERCENTAGE ME(VLSI)

Mepco Schlenk Engineering College,

Sivakasi

Anna University

June 2014

86.61

BE (EEE)

Anna University of Technology, Tiruchirappalli

(BIT Campus)

Anna University

June 2012

79.80

HSC

S.B.K Girls Higher Secondary School, Aruppukottai

Tamilnadu

State Board

March 2008

93.33

SSLC

S.B.K Girls Higher Secondary School, Aruppukottai

Tamilnadu

State Board

April 2006

94.80

SKILL SET

Programming Languages -

C Programming, Verilog HDL, Basics of C++ and Embedded C.

Hardware Devices/Boards -

Xilinx FPGA -Spartan 3/3E Boards, Virtex6 ML605 Board, 8051 Microcontroller.

Software Packages/Tools -

MS Office, MATLAB, XILINX ISE (PlanAhead, EDK), Modelsim, Keil, Basic knowledge in Tanner.

HARDWARE AND SOFTWARE EXPOSURE:

* Front End Design: Synthesis and Implementation of Multirate Processing techniques, BUS Architecture, 8 point DCT, FFT, Simple Processor, ALU and Pipelined Floating point adder, multiplier using Verilog language in FPGA device. 8051 Microcontroller Interfacing with Seven Segment display, LCD, Serial Communication, Matrix Keypad.

INTERPERSONAL SKILLS

* Ability and Willingness to learn.

* Enthusiastic in teamwork.

AREA OF INTEREST

* Digital electronics.

* VLSI signal processing, Reconfigurable computing (Partial reconfiguration).

CO-CURRICULAR ACTIVITIES

CURRENT PROJECT (PG)

* Title

: Reconfigurable Computing of Receiver Architectures for 3GPP-LTE Channels.

* Objective

: Reduce hardware size, area, power and cost.

* Platform

: Digital Front End Design.

* Tools Required

: Software: Modelsim (simulation), Xilinx ISE 13.4 with PlanAhead PR support (implementation), Hardware: Virtex6 FPGA.

ACADEMIC PROJECT (UG)

* Title

: Position and Obstacle Detection System (PODS).

* Objective

: To help the Visually impaired by giving location guidance and obstacle detection.

* Platform

: Embedded Systems.

* Tools Required

: Ultrasonic sensors, GPS, Microcontroller.

ACCOMPLISHMENTS:

* Presented a paper titled, “Power harvesting in mobile phones and laptops using piezo nano ribbons” held at Agnimithra 2012, a National Level Technical Symposium Organized by University College of Engineering, Villupuram on 1st & 2nd March 2012.

* Presented a paper titled, “Hand-Off Approach Based Power Harvesting in Mobile Phones” held at Aveshaa’11, a National Level Technical Symposium Organized by Anna University of Technology, Tiruchirrappalli on 5th September, 2011.

INTERNATIONAL JOURNAL AND CONFERENCES:

INTERNATIONAL JOURNAL(IJ)/CONFERENCE(IC)

NAME OF IC/IJ

ORGANIZATION/

INSTITUTION

MONTH & YEAR

PAGE NO

International Conference

ICRTIT

Anna university(MIT campus), chennai

April 10-12, 2014.

International Conference

ICICT

PES Institute of technology and management, Shivamogga, Karnataka

May 5-6, 2014

International Journal

ICTACT-journal for Communication Engineering

Submission

-

EVENTS CONDUCTED:

* Conducted a Workshop section on, “Xilinx-PlanAhead partial Reconfiguration”, in Mepco schlenk engineering college”, Sivakasi on 5th of April 2014.

* Technical quiz, Guess the Phenomena- conducted in Mepco Schlenk Engineering College, IE Students Chapter (ECE-PG) Association of Communication system & VLSI design Engineering.

PERSONAL DETAILS

* Father’s name

: R.Devadasan

* Mother’s name

: D.Rajalakshmi

* Gender

: Female

* Date of birth

: 27, July 1990

* Age

: 24

* Nationality

: Indian

* Marital status

: unmarried

* Language known

: Tamil, English

* Interests

: Surfing web, Drawing (Pencil Sketch), Craft work, Listening Music

REFERENCES

* Mr.Syed Ameer Abbas,

Assistant Professor,

ECE Department, Email ID:***********@*****.***

Mepco Schlenk Engineering College, Sivakasi. Contact number: 944-***-****

DECLARATION

I hereby declare that the above furnished details are true to the best of my knowledge.

Place: Chennai Yours sincerely,

Date: (D.SHANMUGA PRIYA)

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