Engineer Design

Amir Jalali

303-***-**** ********@*****.*** Longmont, Colorado

Electrical, electronic hardware research, design and development, test and

or failure analysis, engineering manager

I am an accomplished engineering leader with significant experience in

design and development of storage product devices and systems. Experienced

in all phases of new product introduction from feasibility study to formal

testing to product development, manufacturing and customer support.

Skilful in detail failure analysis, environmental influences, performance

drifts and yield improvements

SKILLS

PRML, Magnetic Recording, Read Channel Optimization, Front End Detector

Modeling, Simulation and Design. Analog/Digital Circuit Design/Simulation,

Design for 6 Sigma Manufacturing, Statistical Analysis, EMI/RFI Compliance

Solutions, Parametric Measurements, Control Systems, Test Equipments and

Test Script Optimization, Matlab, Python, Spice, Cad Soft Eagle Schematic

Capture and PCB layout Design, Visual Basic, Microsoft Office, SCSI and SAS

Protocols, Logic Analyzers, Arbitrary Function Generators, Digital/Analog

Oscilloscopes, Time Interval Analyzers, Spectrum/Network/Impedance/logic

Analyzers.

PROFESSIONAL EXPERIENCE

Triad Systems Engineering, Fort Collins, CO

2011-Present

Electrical Engineer

Design and Test of Prototype Circuits, Module Level Test and First System

Test

Lab View and Test equipments, A/D Design and Test

Nuclear control systems, Product design, DFT, Simulation and Tester-Related

Functions.

Responsibilities: Analyze, upgrade and design nuclear control system

modules. Complete five electronic module life cycles: Analog Input Module,

Analog Output Module, Power Supply Monitor Module, Summer Module and

Difference Module. Reviewed the design input artifacts. Wrote test

procedures. Designed modules. Generated module physical design. Generated

module documentation sets. Generated system EMI/RFI and FAT test

procedures. Manufactured modules. Designed verified manufactured modules.

Formally released modules.

GE, Boulder, CO

2009-2011

Test Engineer /Independent Contractor

Testing of Beta Units, System Test

Water treatment analytical instruments

Pilot production, system build, troubleshoot and failure analysis. Project

evaluation, Pilot failure analysis.

Responsibilities: Test, evaluate and debug pilot units, analyze Beta unit

failures, suggest enhancement for design changes, improve lean

manufacturing process.

Maxell Corporation of America, Boulder, CO 2007-2009

Hardware Engineer

Prototype Testing

Deep archive storage tape drive 5 Tbyte, 80 MB/S native

Responsibilities: Project design and supervision, engineering product

feasibility and system architecture, project scheduling and implementation,

resource planning and allocation, proposal negotiation.

. Designed Matlab and Excel prototype models to demonstrate technology

feasibility.

. Designed hardware/software modules to test and to evaluate the prototype

models.

. Architected, developed and optimized an embedded position tracking servo

system.

. Architected, developed and optimized a virtual tracking servo system.

. Optimized recording channel non-linear parameters, filters and targets.

. Published technical specifications and kept a written record of daily

progress.

. Scheduled short term, long term project timelines, budget and vendors.

. Recruited consultants, engineers and technicians to secure adequate

resources and supervised their activities.

Quantum Corporation 1995-2007

Design Engineer IV, Boulder, CO

Product Testing, Test Stands and Test beds and Test equipments

2005-2007

LTO-4/HH full performance tape drive 800Gbyte, 120MB/sec native

Responsibilities: Product development and vendor qualification in

multidisciplinary team environment, engineering specification, DVT system

long term environmental stability and durability.

. Characterized and evaluated vendors tape media samples to qualify

suppliers and to achieve product development goals.

. Characterized read channel error events, causes, distributions and

separations.

. Developed SAS custom test scripts to monitor system environmental

durability and error rate performance over time.

. Published experimental results on the vendors tape environmental

durability and thermal events over time.

Design Engineer IV, Boulder, CO

Test Equipment Design, Test Stands and Test Equipments

2001-2005

Near on line disk/tape backup storage system, multiple modular

configurations

Responsibilities: Product feasibility, project leader, responsible for

read/write channel configuration and optimization, tape media dimensional

stability evaluation, optical servo non-linearity quantization.

. Designed and implemented a high velocity optical logical seek servo

module to move tape up to 700 ips by means of modulated optical servo

patterns.

. Modified the front end detector to incorporate erasure function, reduce

noise, interference and write crosstalk.

. Characterized tape dimensional stability for humidity/temperature/tension

variations.

. Developed Matlab tools to scan media for physical track layouts. The

technique allowed measurements of servo optical non-linearity.

. Developed write process modulation techniques to boost system storage

capacity and data transfer rate.

Design Engineer IV, Shrewsbury, MA 1995-2001

Test Equipment Design, Test Beds and Test equipments, A/D, FIR Test and

Optimization

SDLT high capacity, high performance tape drives 1.6Tbyte, 80MB/sec native

Responsibilities: Product feasibility, product development, individual

contributor, read/write channel chip vendor selection, negotiation and

collaboration, channel chip system integration, optimization and

evaluation, engineering specifications.

. Developed Matlab tools to generate channel amplitude transfer and dipulse

curves to quantize channel NLTS in both time and frequency domains.

. Evaluated and optimized soft target/fixed target partial response read

channels, compared implementation tradeoffs.

. Teamed with external design house vendors to custom design partial

response channels for tape.

. Developed and modified Matlab scripts to enhance read channel

performance.

. Developed techniques to monitor chip case/junction/temp for max transfer

limits.

. Designed hardware/software tools to characterize media drop outs.

. Designed hardware/software tools to measure broad and narrow band SNR.

. Developed tools to evaluate write equalization tradeoffs between SNR/RES.

. Developed VBA excel macros to produce data sets statistics from raw data.

. Modified system design and circuit layouts to reduce EMI/RFI for

regulatory compliance.

. Analyzed and resolved EVT, DVT pilot failures and improved pilot yield to

95%.

. Developed magneto resistive head engineering specifications, negotiated

cost tradeoffs on product tolerances.

. Collaborated with universities for a highly massive local parallel

read/write channels.

Digital Equipment Corporation, Shrewsbury, MA 1987-1995

Design Engineer

Product Design, Test Beds and Test Equipments

DLT backup tape drives 40Gbyte, 6MB/sec native

Responsibilities: Product development for 5 generations of DLT tape drives,

individual contributor, read/write channel and front-end optimization and

evaluation, head/media vendor qualification, engineering specification.

. Designed interface circuits and filters to evaluate sample peak detect

read channels.

. Designed head/media parametric test equipment for head/media vendor

qualification.

. Designed and implemented write equalization to increase recording linear

density and data transfer rate.

. Designed write drivers, pre amplifiers and magneto resistive

voltage/current biasing networks to evaluate technology tradeoffs.

. Evaluated vendor head/media magnetic and tribology properties using

electron and optical microscopes, profilometers, Atomic Force Microscope,

Magnetic Force Microscope and Vibrating Sample Magnetometer.

. Collaborated with industry consultants to generate head/media magnetic

specification.

EDUCATION

San Jose State University, San Jose CA

BS Electrical Engineering

PUBLICATIONS

IEEE transaction on magnetic, tape magnetic recording depth of penetration

IEEE transaction on magnetic, metal particle tape corrosion

PATENTS

US Patent Number 7738212 on Position Tracking Servo

US Patent Number 7826169 on Virtual Tracking Servo

US Patent Number 8213107 on Dimensional Stability

PROFESSIONAL TRAININGS

Matlab, Six Sigma Methodology, Taguchi Method, PRML, Digital Servo Design

for Rigid Disk Drives, Disk Drive Technology, Digital Signal Processing,

ATA/IDE, SCSI Nuts and Bolts, The Physics of Magnetic Recording, Finite

Element Analysis.

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