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Power Pvt Ltd

Location:
Bengaluru, KA, India
Posted:
October 06, 2014

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Resume:

RAHUL R HULYALKAR B.E, (M.Sc-Tech) Mobile : *****-

68579

E-mail :

acf92r@r.postjobfree.com

Objective

< Ambitious to achieve personal goals and the organizational goals, with

a positive approach.

Education Qualification

. M.Sc-Tech in VLSI-CAD, from Manipal University (2012-2014), Manipal with

GPA 7.47

. B.E in Instrumentation from Basaveshwar Engineering Collage affiliated to

VTU, Belgaum with 60.18%

Additional Training undertaken

ASIC synthesis, DFT, Physical Design from IIVDT Bangalore.

Area of Interest

Physical Design: Floor Planning, Placement, CTS, PnR, STA, Timing Closure

Physical Verification: IR Drop Analysis, DRC.

Skills

Cadence RTL compiler, Cadence SOC Encounter, Synopsis ICC, STA

VLSI Projects Profile

Project # 1 : RTL to GDS II of low power application FIR Filter,

Tools Used :

. Cadence RTL compiler for Synthesis and DFT.

. Cadence Encounter for Floorplan, Power plan, CTS, Placement and Route, RC extraction, Power rail analysis, and filling spare cells and

metal.

Gate Count : 200K Gates.

Responsibilities : Synthesis: Clock design, constrains design, Delay

analysis, STA.

DFT : Addition of Mux-DFT, creation of scan chains,

clearing violations.

PD : Floorplanning, Power planning, Placement, CTS, PnR,

PV, IR drop analysis,

Clearing violations, DRC, cell & Metal filling.

Project # 2 : Synthesis of RISC 1200 processor for worst negative slack.

Tools Used :

. Cadence RTL compiler for synthesis and addition of Mux-based DFT.

Gate Count : 1080K Gates.

Responsibilities : Synthesis: Clock design, constrains

design, Delay analysis, STA.

DFT : Addition of Mux-DFT, creation of scan chains,

clearing violations.

Project # 3 : Netlist to GDS II creation for DTMF Block .

Tools Used :

. Cadence Encounter Compiler for Floorplanning, Power plan, CTS,

Placement and Route, RC extraction, Power rail analysis, and filling

spare cells and metal.

Gate Count : 5 Macros + 100K standard cells

Responsibilities : PD : Floorplanning, Power planning, Placement,

CTS, PnR, PV, IR drop analysis,

Clearing violations, DRC, cell & Metal filling.

Work Experience

Previous Employer : Accenture Services Pvt Ltd, Bangalore

Experience : Oct-2010 to July-2013.

Job Description :

Provide operational Assistance towards Enterprise customer and

coordination with development team for further improvement of the product .

Previous Employer : Microland Ltd., Bangalore.

Experience : April-2010 to Oct-2010

Job Description :

Provide Technical assistance for executive customers.

Achievements

Accenture:

. Awarded with Summit award for excel performance.

. Awarded with Numero-UNO Award for excel Performance towards client

expectation.

. Awarded with spot recognition award for maximizing team performance.

Microland

. Successfully identified key bottlenecks in the system and increased the

performance of the system.

Personal Details

Date of Birth : 19th February 1987

Contact Details : #794, 2nd Floor, 9th A main,

Hampinagara, Vijayanagara 2nd Stage, Bangalore

560104

Declaration:

I hereby declare that above information is true to the best of my

knowledge.

Rahul R Hulyalkar[pic]



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