Engineering Project

ABILASHA U R

Email: **********@*****.***

Mobile: +91-996*******,

Summary:

. Trained on c.

. Pursuing Embedded course at MaMinno Technologies Pvt Ltd .

. I had hands on experience on Verilog coding, AAC (Advance Audio

Codec), Microsoft visual studio, Eclipse and the latest tools used in

Industries.

. I have presented and published technical papers at National and

International conferences.

. Ability to research on new technologies and produce remarkable output

in a very short period.

. Proactively seeks opportunities to broaden and deepen knowledge base

and proficiencies.

. Contributes appropriately to conversations and possess Good

interaction with Clients.

Qualification Institution Board/University Year of Percentage

passing

ACADEMIC QUALIFICATION:

MTech (Digital

Electronics Comm,)

MVJ college of engineering

Bangalore

VTU Belgaum

2014

76.90%

B. E (Electronics & Communication)

Ghousia college of engineering, Ramanagara.

VTU Belgaum

2012

70.29%

PUC

Government college for girls,

Mandya District.

Pre-University Board

2008

70.00%

SSLC

Government girls junior college, mandya district.

Karnataka State Board

2006

82.08%

SKILL SET:

High level programming C

language

Assembly languages Microprocessor, Microcontroller

development tools Embedded Design, PIC,ARM, DSP,ASIC

VHDL tools xilinx(Spartan-3) FPGA kit, Modelsim simulator,

Verilog

c developmental tools Microsoft Visual studio, Eclipse

Communication protocols CAN, I2C,SPI

PROJECT DETAILS:

1. Project title: "Efficient FPGA implementation of address generator for

WiMAX Deinterleaver".

Description: This project implements a low-complexity and novel

technique for the address generation circuitry of the deinterleaver

used in the WiMAX transceiver system. It uses the Xilinx field-

programmable gate array (FPGA). The floor function associated with the

implementation steps, required for the permutation of the incoming bit

stream in channel interleaver/deinterleaver for IEEE 802.16e standard

is very difficult to implement in FPGA. A simple algorithm developed

in the proposed approach, it eliminates the requirement of floor

function and thereby allows low complexity FPGA implementation. It

describes a highly efficient QPSK (Quadrature Phase Shift Keying), 16-

QAM (Quadrature Amplitude Modulation), 64-QAM modulation techniques

and the simulation results for the same are presented.

Platform WiMAX, FPGA

Duration 1 year

Team size 1

Tools ISE Modelsim simulator

Xilinx Spartan-3,(device XC3S400)

Language Verilog

2. Project title: "GSM based organization route map"

Description : This project aims at integrating the expansiveness of a

wireless cellular network and the ease of information transfer through the

SMS with the coverage of public visitors to the college. It is there by a

modest effort to give the information about location of the college

premises like different departments, canteen, library, and administration

block.

Platform GSM

Duration 4 months

Team size 4

Tools GSM modem, MAX232, LCD display,

Hex keypad

Language Embedded c

3. Project title: "Measure and Send the values of ECG, BP and Body

temperature to doctor using GSM system".

Description : The Short Message Service allows text messages to be sent

and received to and from mobile telephones. The text can comprise words

or numbers or an alphanumeric combination. This project reports the

"Patient parameter monitoring system using GSM for hospitals and old age

homes" is developed. On detecting the set value of the temperature or ECG

Rate or Blood Pressure GSM device will automatically send an SMS to the

doctor as well as the patient's relative so as to take necessary action.

Platform GSM

Duration 6 months

Team size 4

Tools GSM modem, AVR microcontroller,

ECG sensor, MAX232, LCD display

Language Embedded c

Technical paper presented and published at national and international

conference

. Presented a paper entitled "Novel design Wimax Deinterleaver for

efficient implementation of address generator" and published in IEEE

EXPLORE with ISBN:978********** at the international conference on

ICNIC-2014 held at SVCE,Banglore.

. Presented a paper entitled " Address generation circuitry of wimax

deinterleaver using xilinx FPGA " and published in journal JEST-M

with ISSN NO: 2277-5161 at the international conference on di3c held

at MVJ college of engineering, Banglore.

. Published and Presented a paper titled "Address generation circuitry

of wimax deinterleaver using Xilinx FPGA" in ISBN-978-163173186-0 in

TECHMAN-13 national conference held by Acharya Institute of

Technology, Bangalore.

. The paper "Fast wimax deinterleaver address generation with reduced

complexity using FPGA" is published in international journal with

ISSN NO:2320-3706 at yuva engineers.

. Presented a paper entitled " Wavelet packet transform based image

compression " at the international conference on di3c held at MVJ

college of engineering,Banglore.

. Participated in Patrika Paper Presentation at "CRESCO 12.0" a National

Level Technical Fest at PES college of engineering, Mandya.

INDUSTRIAL EXPOSURE:

. Participated in the workshop titled "Wireless Embedded Technology"

conducted by epitome technologies on 20th April at Banglore.

. Attended one day workshop on "embedded systems" organized by

electronics and communication department in MVJ college of

engineering, Banglore

. Attended an integrated PhD programme held by department of Indian

Institute of Science Education and Research (IISER) at

Thiruvantapuram. Kerala.

ACHIEVMENTS:

. Received Talented Award in District level ESSAY Competition.

. Facilitated with class topper in 12th standard.

. Received 2 Gold medals at national level in putani vignyana exam on

2005 & 2006.

PERSONAL STRENGTHS:

. Positive attitude and leadership qualities.

. Passionate in learning new technologies.

. Flexible to accommodate as per business needs.

. Good communication ability.

PERSONAL DETAILS:

Date of : March 29,1991

Birth

Father name : Ramesha

Gender : Female

Languages : English, Kannada

Known

Nationality : India

DECLARATION:

I do here by declare that all the information furnished above is true to my

knowledge.

Date:

(Abilasha U R) Place: Bangalore

Contact this candidate