Jeff Bush, P.Eng.
Toronto, Ontario ? 416-***-**** ? *********@*******.***
EXPERIENCE
Thales Rail Signalling Solutions
Toronto, Canada
Safety and Reliability Engineer
Electronics and electrical safety case development for metro rail
train signalling systems. A computer based system controls trains to
increase system throughput and safety.
Lead failure mode, effects and criticality analysis (FMECA) to
improve the safety and reliability of printed circuit boards.
Analyzed circuit boards one electronic component at a time or in
functional groups of components.
Systems level FMECA to show safety and reliability of the entire
train's electronics system. The goal of this analysis is to show
that the system is safe and reliable.
Maintainability work showing reliability centered maintenance (RCM)
and demonstration reports. These reports showed that customer
requirements were met during train systems demonstrations.
Fault tree analysis (FTA) and Markov analysis to describe more
complicated failure scenarios involving multiple failures.
Safety and or maintainability documents were created for New York
City Transit, Walt Disney World monorail, Beijing metro and others.
Availability calculated to show train system uptime vs. downtime.
Talks given on statistics, use of software to increase efficiency
and models.
Contracts and Business Development
2005 - 2006
Waterloo and Kingston, Canada
Contract for DALSA working in electronics hardware design of digital
cameras.
Ridge-top Group contract to develop technology proposals for U.S.
government projects.
Alcatel
2000 - 2002
Ottawa, Canada
Digital Electronics Hardware Designer
. Designed and tested electronic printed circuit board assemblies and
microchips (FPGA).
. Managed power supply, thermal design, test and manufacturing teams.
. Part of team developing a new Internet services router for
telecommunications service providers.
. Schematic capture of printed circuit board which included high speed
busses, network processors and a multi-core microprocessor.
. Lab work to verify that the design met requirements
. Simulation of printed circuit board and FPGA.
. Used VHDL language to design CPLD and FPGA type microchips. Simulation
tools were used to verify the designs.
Newbridge Networks
Summers Internships 1996 - 1999
Ottawa, Canada
Four internships at this telecommunication electronics developer
provided experience in designing products for the telecommunications
market.
1999: FPGA design and PCB verification including a verification
document for a microwave frequency modem.
1998: Analog design and verification with a university professor
working to ensure proper operation and manufacture of an ADSL
communication modem.
1997: Worked to build an electronics lab for a hardware development
team designing ADSL modems. Ordered and set up equipment. Some
schematics capture completed
1996: Introduction to electronics engineering through schematics
entry for a fiber optics telecommunications switch. Work included
cost analysis for multiple PCB assemblies.
EDUCATION
Bachelor of Applied Science, Electrical Engineering
Queen's University, 2000
ADDITIONAL INFORMATION
Professional Engineer in Ontario, Canada.
Graduate Courses in Electronics and Photonics Engineering
Queen's University, Kingston, Canada, 2004 - 2005
Society of Reliability Engineers, Toronto, Chapter Chair
2008 - 2013
Organized and delivered speeches to local reliability professionals.
Communicated organisations messages to members.
Dale Carnegie Course on workplace communication
More than ten years of French language training.
Office Manager (Kanata 2002-2003)
Chief of staff for a small office of volunteers to aid participate
in a candidate nomination
Coordinated personnel and training for people new to the office
Kept office volunteers productive
Queen's University Engineering Society (Kingston 1996-2000)
Vice President in the education portfolio for Engineering Student
Societies' Council of Ontario
Applied Science 2000 representative to the Alma Mater Society
Welcome Committee; organized events for more than 300 students