CRAIG METZNER

**** ***** ****** ***** ( Simi Valley, California 93065

805-***-**** ( aceoz8@r.postjobfree.com

SENIOR ENGINEERING DIRECTOR, SITE MANAGER

Highly accomplished engineer and adept, proactive leader with expertise

driving new product development and exceeding profitability objectives in

ever-changing technical environments.

. Superior ability to direct diverse, cross-functional teams and focus

development on critical organizational needs and penetrate new and

profitable markets.

. Maximizes growth through proven cost containment and process improvement

strategies.

AREAS OF EXPERTISE

R&D New Product Development ( Cross-Functional Team Leadership (

Productivity Improvements ( Product Launch ( Profit Growth ( Cost Controls

( Product Lifecycle Management (

Diverse Engineering Expertise ( P&L Accountability ( Resource Allocation (

Efficiency Improvements

Team Building ( Key Business & Product Development ( Vendor Relations ( New

Market Penetration

PROFESSIONAL SYNOPSIS

veeco instruments, Camarillo, California ( 2008-Present

Senior Director of Engineering and Camarillo Site Manager - Slider Division

Oversee all engineering functions in Slider Division, as well as manage all

employees at the Camarillo site - responsible for design and development

of complex capital equipment utilized in data storage and LED markets.

Manage resources in mechanical, electrical, system/controls and software

engineering for diverse projects within the division. Identify, define,

launch and lead new project development initiatives to ensure new product

pipeline and ongoing profitability for division.

. Led team that developed next generation dicing tool that achieved 40%

reduction in material cost while maintaining highest performance.

. Leader of team developing a highy complex next generation lapping system

for the data storage markets currently in Beta test

. Forged significant improvement in customer satisfaction through rapid

response to technical needs.

. Led development of a new laser-based processing system for LED die

singulation, a previously unaddressed market for the division.

. Responsible for P&L, budgets, strategy and resource allocation for

division of about $50M sales

asm america, Phoenix, Arizona ( 2008

Senior Director of Engineering

Led design engineering - oversaw 70-person engineering group spanning 2

product divisions in atomic layer deposition (ALD) and Epitaxial deposition

(Epi) of thin films used in semiconductor device manufacturing. Directed

cross functional engineering professionals spanning mechanical, electrical,

process and software disiplines. Set and led strategic direction for

product development and implemented demanding plans to maximize resources.

applied materials, Santa Clara, California ( 1997-2008

Director of Engineering - Epitaxial Silicon Deposition

Directed $180M Epitaxial Silicon Deposition Product Unit within Front End

Products (FEP) division. Orchestrated numerous product development teams,

14 direct/indirect reports and total team of 30 cross functional

engineering professionals. Interacted with clients and collaborated with

senior management team to develop aggressive strategies for product

improvements and business growth.

. Reduced total material costs and greatly improved on-wafer uniformity

performance by 50% - led product development team in the design of an

innovative new modular Epitaxial chamber.

. Orchestrated development of low cost 4 chamber 300mm Epi cluster tool -

improving market penetration considerably.

. Streamlined manufacturing and start-up cycle times by outsourcing

modules, utilizing vendor sites for modular testing - created 20%

reduction in manufacturing cycle time.

. Drove >300 hour mean time between failures (MTBF) by resolving current

product reliability issues.

. Awarded inaugural Excellence in Leadership distinction - annual division-

wide award given to manager and voted by rank-and-file.

APPlied MaTerials - Continued

Senior Program Manager - High k Gate

Generated design, development and product launch for new CVD product to

deposit High-k materials used as transistor gate insulators in logic

devices enabling faster transistor switching speeds. Managed team of 16

managers and engineers throughout cross-functional process. Identified,

implemented and presented numerous technical, business and financial

updates to ensure customer needs were met.

. Spearheaded development of Hafnium based film now used in all high-end

Intel microprocessors - drove relatively small technical team through

severe budget constraints to create product that has now led to numerous

patents, awards and publications.

. Forged quick productivity to ship first product after only 9 months from

team conception - completed design and product release to ship eight

$5M R&D systems to global customers.

. Authored 3 technical papers and several patents including patent for new

chemical precursors enabling repeatable and stable deposition - which is

now most common process used industry-wide.

Program Manager - 300mm Remote Plasma Oxidation (RPO)

Managed development and release of 300mm plasma oxidation product needed to

generate atomic oxygen and oxygen radicals that anneal Tantalum oxide film

for dielectric in DRAM devices. Designed and implemented contamination-

free, reliable and low cost remote plasma source to deliver atomic oxygen

to chamber.

. Produced product in record time (approximately 6 months) and received

high praise/numerous reorders from customers.

Engineering Manager - 200mm Tantalum Oxide Product Development

Led team assigned to design, develop and implement new CVD Tantalum Oxide

cluster tool. Wrote software specifications, maintenance procedures, final

testing and field start-up documents.

. Identified and leveraged internal technologies to minimize product

development lifecycle.

Lam research inc, Fremont, California ( 1995-1997

Senior Mechanical Engineer

Assigned to design and development of new modules and enhancements to sub-

assemblies of 9800 CVD system. Managed all projects related to engineering

change notices (ECN's) on 9800 system.

. Improved design and cost control through several designs including

reliability enhancements to wafer handling robotics, innovative

temperature probe and new vacuum load lock.

Career Note: Previous experience as Mechanical Design Engineer at Silicon

Valley Group (now Aviza) and Design Engineer - Flat Panel Display at

Watkins Johnson Company (now Aviza) spanning period from 1988 -1995.

EDUCATION / PROFESSIONAL DEVELOPMENT

Master of Business Administration

San Diego State University, San Diego, California

Master of Science in Mechanical Engineering Coursework

Stanford University, Palo Alto, California

Bachelor of Science in Mechanical Engineering

University of Colorado, Boulder, Colorado

CRAIG METZNER

( Page 3 (

aceoz8@r.postjobfree.com

PUBLICATIONS

Wai Lo, Arvind Kamath, Shreyas Kher, Craig Metzner, Jihanguo Wen, Zhihao

Chen. "Deposition and characterization of HfO2 high k dielectric films." J.

Material Res, Vol 19, No 6, June 2004.

Craig Metzner, Ajay Kumar, Jaklyn Jin, Wei Liu, David Mui, Shreyas Kher and

Gregg Higashi. "Integrating High-k Dielectric Gates in Sub-65 nm

Structures" Semiconductor Manufacturing, Vol 4 Issue11, Nov 2003.

Y. Kim, C. Lim, C.D. Young, K. Matthews, J. Barnett, B. Foran, A. Agarwal,

G.A. Brown, G. Bersuker, P. Zeitzoff, M. Gardner, R.W. Murto, L. Larson, C.

Metzner, S. Kher and H.R. Huff "Conventional poly-Si gate MOS-transistors

with a novel, ultra-thin Hf-oxide layer", Proceedings of the 2003 symp.on

VLSI Technology, (2003).

Craig Metzner, Padmapani Nallan, Ajay Kumar, Guangziang Jin, Wei Liu, David

Mui, Shreyas Kher, Gregg Higashi. "Integrating a High k dielectric Gate

Process Flow for Sub 65-nm Structures" Nanochip Technology Journal, Volume

1, Issue 1, 2003.

4 papers presented at Applied Materials internal Engineering and Technology

conferences 2000-2005.

PATENTS

D Ishikawa. C Metzner, A Zojaji, Y Kim, A Samoilov "Gas Manifolds for Use

During Epitaxial Film Formation" US Patent #7,674,337. Filed 4/7/06, issued

3/9/10.

C. Metzner, S Kher, S Han "System and Method for Forming a Gate Dielectric"

US Patent #7,304,004. Filed 8/6/04, issued 12/04/07.

C. Metzner, S Kher, V Gopal, S Han, S Athryea "ALD Metal Oxide Deposition

Process using Direct Oxidation" US patent 7,067,439 Filed 9/19/02, issued

6/27/06.

C. Metzner, S Kher, S Han "System and Method for Forming a Gate

Dielectric". US Patent 6,858,547 Filed 9/22/02, Issued 2/22/05.

C. Metzner, T Sahin, G. Redinbo, P Narwankar, P Liu "Deposition Reactor

Having Vaporizing Mixing and Cleaning Capabilities". US Patent 6,454,860

Filed 10/27/98 Issued 9/24/02.

NOTE: 11 additional patents pending and lead inventor on 6.

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