Good knowledge in Verilog,VHDL,PERL,TCL.

ANJANA BALACHANDRAN

E*/***,”MIRRA”, K.S.H.B COLONY, Ottapalam, Palghat-679103, Kerala,India

E-Mail ID: **************@*****.***

Mobile No: +91-887*******

OBJECTIVE

To work for an organization that enables me to learn and contribute to the succe ss of the organization,

thereby improving my career development.

EDUCATIONAL PROFILE

YEAR

QUALIFICATION INSTITUTION BOARD AGGREGATE OF

PASSING

M.Tech - VLSI

VIT University Deemed University 8.09/10 2015

Design

Dr. Mahalingam

B.E. – Electronics and College of Anna University,

8.8/10 2013

Communication Engineering and Chennai

Technology

Cluny Matriculation

Tamil Nadu State

12th Standard Higher Secondary 95.3% 2009

Board

School, Salem.

Cluny Matriculation

10th Standard Higher Secondary Matriculation 90.4% 2007

School, Salem.

TECHNICAL SKILLS

Programming Languages – PERL, TCL, Verilog, VHDL

Softwares Known – ModelSim, Cadence, Xilinx, Multisim, TinaTI, Eagle, NCsim, RC.

AREAS OF INTEREST

ASIC Design, Low Power IC Design, CAD for VLSI, VLSI Testing and Testability, Digital IC

Design

PROJECTS

Design of Decompressor for Cumulative Transmission Cyclic Shift updating(CTCS) Technique

for multiple scan chains-This project aims in reducing the amount of test data thereby causing less

memory requirement. This was achieved by using a cyclic shift compression technique.

Low Power Multiplier Design for Complex numbers- This project proposes an architecture for low

power multiplier for complex number multiplication. Shift and add based multipliers were used to

bring about a good amount of power reduction.

Design of Router for Self Testing NOC- This project aims at designing a router for self test NOC.

FPGA implementation of High Speed Mitchell Log and Vedic Multiplier- This project was aimed

at functionally verifying the two high speed multipliers on Cyclone-II board.

Design of Fool Proof Encoder and Decoder for Nano memory application- This project focuses

on the achieving a fully fault-tolerant memory system that is capable of tolerating errors both in the

memory also all the other supporting logic including the encoders and decoders. Euclidean Geometry

codes were used.

ACADEMIC ACHIEVEMENTS

Successfully completed a short term course on PCB designing from SUNSHIV Electronics.

Attended a workshop on “Embedded systems and Expert systems” at Park Engineering

College, Coimbatore.

Attended a workshop on “Designing and Developing Real-Time Projects” organized by

Spectrum and ISTE-MCET students chapter of Dr. Mahalingam College of Engineering and

Technology,Pollachi.

Attended a workshop on Robotics conducted in partnership with University of Edinburgh UK

at Dr.Mahalingam College of Engineering and Technology, Pollachi.

EXTRA CURRICULAR ACTIVITIES

Served the college as the Student Discipline and Welfare Coordinator (SGS-Student Guild of

Service, 2012-2013).

Had been the vice-chairperson of WIE (Women In Engineering) and an active member of

IEEE.

Participated thrice in district level athletics meet.

CONFERENCES AND PAPER PRESENTATIONS

1. Presented a paper at The International Conference on Electrical Engineering and Computer

Science (IEECS), Hong Kong conducted by Asia Pacific Research Center on “Fool Proof

Encoders and Decoders for Nano Memory Application” in December 2013.

2. Presented a paper at The National Conference held at Bannari Amman Institute of

Technology on “Fool Proof Encoders and Decoders for Nano Memory Applications” in

April 2013

PERSONAL PROFILE

FATHER’S NAME: Mr.K.B.Balachandran.

DATE OF BIRTH: 04.06.1991

NATIONALITY: Indian

HOBBIES: Dancing, Poetry writing, Teaching, Painting.

LANGUAGES KNOWN: English, Hindi, Tamil, Malayalam(MT) [Speak/Write/Read]

German, French [Read/Write]

REFERENCE

Dr.R.Sudhakar Mr.S.Ravi

Head Of the Department(HOD), Assistant professor(senior),

Electronics and communication Engineering, VLSI Division,

Dr.Mahalingam College of Engineering and Technology Vellore Institute of Technology,

Pollachi. Phone: 91-979-***-****.

Phone: 91-944-***-****. Email: ***********@*****.***.

Email:*******@******.**.** .

DECLARATION

I, hereby, declare that all the particulars of information and facts stated above are true, correct and

complete to the best of my knowledge and belief.

PLACE: Vellore.

ANJANA BALACHANDRAN

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