Engineering Training

RESUME OBJECTIVE

CHETNA VED "To Seeking a position to utilize my skills and

abilities in the electronics domain that offers

************@*****.*** professional growth while being resourceful, innovative

and flexible "

Permanent Address

ACADEMIC RECORD

Vaid Niwas Pursuing M.Tech in Microelectronics Engineering from

Near Patwarkhana, VPO Manipal University Jaipur with 7.3 CGPA in first year.

Saproon

DISTT. Solan

H.P.173211 Bachelor of Technology, 2007-2010

(ELECTRONICS & COMMUNICATION ENGINEERING)

Mobile : +91-876******* [HIMACHAL PRADESH UNIVERSITY ]

Institute of Engineering and Emerging Technology,

Baddi, Solan, HP

Personal Profile 72.43%

Date of Birth : 27-09-88

(DIPLOMA, 2004-2007)

Gender : Female [H.P Takniki Shiksha Board]

Government Polytechnic for Women College, Kandaghat,

Solan, H.P

Marital Status : Single 71.95%

Nationality : Indian

(10th, 2003 - 2004)

Age : 24 (HIMACHAL PRADESH BOARD)

Govt. Girls Sen. Sec. School

Interests And Hobbies

Solan, H.P.

Listening to music 68%

Dancing

ACHIEVEMENTS AND INDUSTRIAL TRAINING

GATE-2011 qualified

Merit holder in Diploma, H.P Takniki Shiksha Board

batch 2005-2008

Merit holder in 10th, Himachal Pradesh Board, 2004 -

2005

EXICOM Telecommunication Limited, Chambaghat, Solan, H.P

for 4 weeks

HFCL Telecommunication Limited, Chambaghat, Solan, H.P

for 4 weeks

Network Training from Jetking, Hamirpur, H.P for 6 weeks

TECHNICAL SKILL

HTML5 and CSS

ORCAD, PSPICE

VHDL AND VERILOG

ACADEMIC PROJECTS

Linguistic Abilities Title: Virtual camera eye.

Languages: Duration: 6 months

English Team Size: Three

Speaking

Writing Title: Traffic and Street Light Controller

Reading Duration: 6 months

Team Size: Two

Hindi

Writing

Reading TECHNICAL ACTIVITIES AND ACHIEVEMENTS

Speaking

Actively Participated in CISCO Training undertaken by

Punjabi NETWORK BULLS in 2014

Speaking

Co-Coordinator of Technical Event TECHDEATE - 2014,

H.P (Pahadi) MUJ.

Speaking

Active member of the Organizing Committee in college

I received prizes and applaud in quiz in various

departmental functions in my school.

AREAS OF INTEREST

VLSI Circuit Design

Analog and Digital Communication

ASSETS

Effective leadership qualities

Quick learning ability

Self Confidence.

I hereby declare that the information furnished above is

true to the best of my knowledge.

PLAC CHETNA VED

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