M.Tech VLSI Design

VADLAMUDI DIVYA

Email: *****************@*****.***

Mobile: 962-***-****

Career objective

To succeed in an environment of growth and excellence and to earn a job which provides me

job satisfaction and self development and help me to achieve personal as well as organization

goals.

Qualification

Master of Technology (VLSI Design)

Academic Record

Degree Institution Board / University Year of Percentage

Passing

M.Tech Vellore Institute of 2015

(VLSI Technology, VIT University (pursuing 82.1

Design) Vellore )

B.Tech Siddharth Institute of

JNTU Ananthapur 2013 81.24

(ECE) Engg & Technology

Board of

Intermediate

Sri Chaitanya Intermediate 2009 95.1

(MPC)

Education.

Board of Secondary

S.S.C Mother land high school 2007 90.5

Education.

Technical Skills

Programming Languages : C

Languages : Verilog, Perl

Tools and libraries : Quartus II, Modelsim, Cadence

Academic Projects

Title: Bus Encoding Method for Crosstalk and Power Reduction

Crosstalk is becoming one of the major problems in VLSI interconnects. This is mainly

due to the coupling capacitance and transitions between the interconnects. Here we used

encoding and decoding techniques to reduce the number of transitions between the lines.

As the number of transitions reduces, the effect of crosstalk, power consumption and

delay also reduces.

Title: FPGA Based Home Automation through PC

This project is designed to control home appliances from the personal computer using

FPGA. The user controls devices by employing a central Field Programmable Gate Array

(FPGA) controller to which the devices and sensors are interfaced. Here the controlling of

the devices is done from the personal computer by using hyper terminal.

Achievements

Project got selected in conference “SET 2014” in VIT.

Got second prize in paper presentation in national level technical fest conducted by

Narayana Engg College (Nellore).

Extra Curricular Activities

One of the tour organisers of our college tour.

Taking part in Branch Association programs in engineering.

Personal Profile

Name : Vadlamudi Divya

Father’s Name : V. Raghunadha Naidu

Languages Known : English, Telugu

Permanent Address : 10-128-11/2, V.V.Nagar, Tiruchanoor Road, Tirupathi,

A.P

I assert you that the information furnished above are true to my knowledge.

Date : July, 14th 2014

Place : Vellore

Vadlamud

i Divya

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