Post Job Free
Sign in

Electrical Engineer/Project Manager

Location:
Phoenix, AZ
Posted:
April 29, 2014

Contact this candidate

Resume:

REGINALD NORA

602-***-****

********.****@*****.***

**** **** ******* *****

CHANDLER, AZ 85286

SUMMARY

Engineering and Management experience in the semiconductor manufacturing industry. A dedicated design and construction professional involved in the industry since 1996. Personable and successful at building strong professional relationships. Lead execution of tool install, base-build design, and construction projects. Managed large and complex projects while maintaining high team morale and energy.

EXPERIENCE SUMMARY July 2012–Present Intel Corporation Ocotillo, AZ

Discipline Lead for Life Safety Systems, Instrumentation & Controls, and Security

Operated in both a multi-prime and CM at Risk environment. Managed a budget of $12.6 million. Defined project deliverables and monitored status of tasks, scope, costs, schedule, and resources. Report out project status and proposed changes with stakeholders. Collaborated with cross-functional teams to draft project scope, schedules and plans. Followed specifications for purchase of materials and equipment for purchasing. Reviewed and facilitated processing of RFI’s and submittals. Monitored the safety of all construction activities, making on-site personnel safety the top priority.

May 2010 – June 2012 Intel Corporation Ocotillo, AZ

Small Projects & General Construction Design Manager/Projects Electrical Engineer

SPGC Design Manager responsibilities included bidding projects to multiple A/E design firms, manage and collaborate with selected A/E firm, support drawing reviews, manage design schedules, and construction support, for all General Purpose Construction (GPC), and Base-build Projects for Ocotillo Campus. Electrical Engineer responsible for scope development for Process Ramp for base-build infrastructure and tool install Ramps. Tasks included, but not limited to, design reviews, load analysis, estimation, and field investigation.

Jan. 2010 – May 2010 Intel Corporation Ocotillo, AZ

Tool Install Design Manager

Ownership of A/E design management and electrical scope development with responsibilities of estimation, forecasting, construction support, and schedule baseline for Tool Install. Report out project and schedule status to management, collaborate with Tool Install customer to improve processes and resolve.

May 2008 – Dec. 2009 Intel Corporation Santa Clara, CA

Intel Masking Operation Tool Install Design Manager

Accountable for electrical scope development, estimation, field investigation, A/E design management, drawing reviews, construction support, schedule baseline, implementation and execution of Design Contracts and Design Criteria for Tool Install, CPG, and PSSS Projects. Solicit bids from Design firms, award bids, and write purchase orders. Developed Tool Install RFP and Base Build RFP. Responsible for leading AE firm and Engineers in the programming, design, and construction. Report out to all stakeholders. Tracked funding and oversee all design scope.

Mar. 2006 – Apr. 2008 Intel Corporation Santa Clara, CA

Electrical Project Engineer - Tool Install & General Projects/CAD Supervisor

Coordinated with customers, A/E firms, procurement, and project managers on all projects. Supported development factory as electrical engineer on technology ramp, and progressive build. Responsible for design and construction of Low Cost Data Centers, Data Center Expansions, entire Floor renovation for pilot work environment. QA/QC all design packages. Define, validate, and manage contractual Scopes of Work. Receive, review, and transmit submittals, and RFI’s. Provided Estimates and Take-offs. Managed the electrical utility requests process. Resolved POC issues, communicate issues to stakeholders.

Monitor and direct manpower for contingent workforce, execution of work activities, and assign projects. Develop and implement CAD processes and procedures. Perform CAD and document audits per Project Management Processes and Intel Standards.

Aug. 1996 – Mar. 2002 Intel Corporation Santa Clara, CA

CAD Designer/Document Control

Developed and managed check in/check out process for documentation. Perform CAD and document audits per Project Management Processes and Intel Standards. Provided CAD support to Facility Operations, Project Engineering which contributed to over $100,000 in cost savings. Maintained System Master drawings and archive of all as-built drawings. Chairman of regional CAD team and active participant in cross site Intel CAD Standards Team.. Competently juggled multiple assignments while maintaining the highest emphasis on quality.

1992–1996 A+ Engineering Inc. Hayward, CA

Electrical Engineer/CAD Designer

Duties included, but not limited to, load flow analysis, voltage regulation, short circuit analysis, and panel distribution load calculation. Size cable services for distribution panels, motors, transformers, and HVAC equipment. Update one line diagrams, panel schedules, control schematics, electrical physical layout drawings, and general arrangement. Field walk down and data collecting for design modifications.

EDUCATION

Bachelor of Science in Electrical Engineering

Southern University, Louisiana

July 13, 1993

TECHNICAL EXPERTISE

Lean 6 Sigma Trained, Dale Carnegie: Effective Communications & Human Relations/Skills For Success Program, Windows 7 & 8, Microsoft Office Suite, including Microsoft Project and Access, Microsoft Lync, GoToMeeting, WebEx, Photo Editor, and Adobe Enterprise. Over 10 years’ experience with MicroStation and Autodesk products; AutoCAD, Design Review, TrueView, and Navisworks.

REFERENCES

Available upon request.



Contact this candidate