Project Manager Design

Debra Dean

**** ********* *****, ******, ** *****

512-***-**** (cell) debkdean@gmail.

IC Layout Mask Designer

SUMMARY OF QUALIFICATIONS

. 10+ years of experience in advanced CMOS process design of digital,

analog and mixed signal layout. Excellent problem solving skills,

highly regarded for reliability in grasping new technologies and

implementing into work environment and the ability to identify

opportunities for improvement.

. Extensive work with IC designers to complete physical implementation

of circuits by component placement. Consistently deliver high quality

and detail oriented layout. Participate with designers and project

lead for design review.

. Possess good organizational, communicative skills and semiconductor

knowledge in consulting with engineers to plan and implement complex

mask design tasks, e.g. floor planning, full custom layout, layout

verification and debugging.

LAYOUT METHODOLOGIES

Full Custom Digital (emphasis on Memory Bank Design, SRAM), Analog, and

Mixed Signal

CMOS Logic knowledge, FinFETS and double patterned metal, diodes,

resistors, capacitors and connection according to schematics.

DFM knowledge, Debug and validation of DRC/LVS/QA/ERC decks utilizing

Mentor Calibre and Hercules.

Experienced in high and low voltage, low and high power, noise immunity and

latch-up prevention practices.

Transistor level, IP Blocks, leaf, standard cell library layout and Pcell

expertise.

Version Control

Analog knowledge for common centroid, matching, shielding, isolation

knowledge for efficient layout.

FOUNDRY EXPERIENCE

14nm/16nm, 28nm, 40nm, 65nm, 90nm, 0.13um, 0.18um

PROFESSIONAL EXPERIENCE

IC Enable - Austin, TX 6/13 - 10/11/13 IC Layout Designer.

. Specializing in 14nm/16nm FinFET design high performance circuitry

layout and planning.

. Dual pattern metal technology.

. Special attention to complex hierarchy structure circuits (upper level

routing for efficiency to minimize higher level metal usage).

. Experienced in Cadence (Virtuoso XL and VXL)

Able to create full custom IC layout designs from transistor level

cells to top level.

. Extensive knowledge of verification tools and rules for DRC, LVS and

ERC, clean up and debug.

Flare Industries 10/2011 - 5/13 Asst. Project Manager for the Asia/Pacific

projects. The company designs and manufacturers flare systems for

pollution control for use by refineries, chemical processors and natural

gas production.

. Duties include tracking status of projects and expediting activities

necessary to keep projects on schedule.

. Coordination with purchasing to assure that necessary materials are

ordered for projects and are on track for delivery. Maintain material

status reports.

. Track project cost versus quotes, perform final shipping inspections,

witness customer inspections. Job requires extreme attention to

detail.

. Interaction within departments for receipt of necessary design

calculations and drawings for submittal to customers to meet

established timelines.

Mediatek Wireless, Inc. 2008 - Jan. 2011 (wireless division of Analog

Devices was acquired by Mediatek.)

. Extensive knowledge in custom memory (SRAM, storage units, memory

banks, etc.), and PLL design and DSP processors.

. Completed work on 40nm and 28nm registers, start to finish. These

were completed in advance of schedule and exceeded speed requirements.

Layout of custom cache MT6573 for use in Mediatek's top smart phone

part of the year.

. Designed and implemented differential circuitry and high speed

standard cells. Emphasis placed on cell design to minimize capacitance

on critical nets.

. Creation of detailed tutorials for many Cadence functions and

summarized DRC (28, 40, and 65nm) documents and for quick reference

guides.

. Standard cell/transistor level expertise.

Analog Devices 2000 - 2008 (see above)

. Low power wireless DSP

. Memories (SRAM), standard cells, PLL, power grids

. Custom cache

. Transistor level layout

TECHNICAL SKILLS/TOOL KNOWLEDGE

. Cadence Virtuoso XL, VXL

. Mentor Graphics Calibre, Hercules verification

. Platforms - Unix

. MS Word, MS Excel, Outlook

EDUCATION & TRAINING Austin Community College - Integrated Circuit Design

I and II, DC Circuits, Engineering Graphics, Electronics Drafting, Auto

CAD. Cadence Training Factility. Miscellaneous course work: Accounting I &

II. University of Maryland - internal auditing

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