Project Design

ANKUSH KUMAR

Mobile: +91-981*******

E-Mail: ************@*****.***

To work in a professional environment where I can learn more and also

enhance my managerial skills and technical ability that adds value to my

profession and personality.

Executive Summary

. Undergoing a six month training in Advance VLSI Designing (Front End)

from Incise Infotech Pvt. Ltd., Noida.

. B.E. (Electronics &Telecommunication ) from Jawaharlal Nehru Engineering

College, Aurangabad under Dr. BAMU.

. Acquired fair knowledge and understanding of subjects like SYSTEM

VERILOG, VERILOG HDL,VHDL, Digital Design, C language,C++ language,

SystemC..

. Proficiency at grasping new technical concepts quickly & utilizing it in

a productive manner.

. Believe in continuous learning and an innovative approach.

. Adaptable and a quick learner, possesses skills to work under pressure.

Academic Credentials

2009-2013 B.E. (Electronics & Telecommunication ) from Jawaharlal Nehru

Engineering College, Aurangabad under Dr. Babasaheb

Ambedkar Marathwada University.

Secured 61.04% marks.

2008-2009 Intermediate (C.B.S.E Board) from ARMY Public School (Delhi

Cantt.).

Secured 78% marks.

2006-2007 High School (C.B.S.E Board) from ARMY School (Shillong).

Secured 81.4% marks.

Technical Skills

Programming Languages : C Language, OOPs,

Operating System : Window XP, Linux

EDA Tools : Xilinx ISE, ModelSim

HDLs : Verilog HDL, System

Verilog, VHDL,SystemC.

Others : Sound knowledge of MS Office and

windows registry.

Projects

Project 1: AHB (Advanced High Performance Bus) Slave (Design and

Verification)

. Tool Used : Modelsim

. Operating System : Windows

. Language Used : Verilog, System Verilog

Description : The goal of the project is to study the specification of

AHB and to create an environment to verify the functionality of

AHB Bus Slave.

My Contribution: Studied the protocol of the AHB prepared the design

specification of AHB slave, the micro-architecture document and the

verification guide for the IP. Verification of the IP using System

Verilog.

Project 2: DESIGN and VERIFICATION A Vending Machine

. Tool Used : Modelsim

. Operating System : Windows

. Language Used : Verilog

Description: A vending machine is a machine which dispenses items such as

snacks beverages to customers automatically, after the customer

inserts currency into the machine. The design is formed by clubbing

multiple FSM (Finite State Machines) for the desired item.

My Contribution: Coding of state machine of vending machine was done by

using Verilog language and after that Test Bench coding was done for

verification purpose in System Verilog the inputs were derived from

generator to Design through driver and the outputs were checked on monitor

and compared in scoreboard the were Waveforms produced in Modelsim.

Project 3: DESIGN A Vending Machine

. Tool Used : G++ Compile

. Operating System: Linux (Ubuntu 12.04)

. Language Used : SystemC

Description: A vending machine is a machine which dispenses items such as

snacks beverages to customers automatically, after the customer

inserts currency into the machine. The design is formed by clubbing

multiple FSM (Finite State Machines) for the desired item.

My Contribution: Coding of state machine was done by using systemc language

and after that Test Bench coding was done to provide the input and check

the output by producing waveforms in GTKWAVE viewer.

Academic Project Undertaken

Project Title: Quadrature Amplitude Modulation using VHDL

Tools Used: Xilinx ISE, VHDL

Overview: In this project we are modulating 6 bit input into

64 bit digital signal by the method of quadrature amplitude modulation on

the platform of very high speed integrating chip hardware description

language. The 6 bit input is converted in to 64 bit modulated output under

the standard of floating point IEEE 754. The converted 64 bits are

programmed on the Xilinx ISE 8.2 software of VHDL programming and finally

the simulated program is tested on FPGA kit.

Extra Curricular Activities/Achievements

3

. Organizer of various technical events. Robowar, Roborace, Circuit

Mania etc

. College gathering organizing committee.AWUT, TECHFEST, TECHNOCRATS,

RAAZMATAZ.

. Runner Up in Inter College Basketball Tournament.

. Winner of college basketball tournament.

Personal Traits

Date of Birth: - 15/10/1991

Permanent Add: - H.No. 70

North Block

Vipin Garden Uttam Nagar

New Delhi - 110059

Nationality: - Indian

Languages: - English, Hindi

Declaration

I hereby declare that the above mentioned information is correct up to my

knowledge and I bear the responsibility for the correctness of above

mentioned particulars.

Date:

Place:

(Ankush Kumar)

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