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Project Design, validation on FPGA/ ASIC, networking, DSP

Location:
Bangalore, KA, India
Posted:
May 24, 2014

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Resume:

TEJAS SHANMUKHA SWAMY

#***, **** **** ****, * C Layout,

Email ID:

acd90y@r.postjobfree.com

Vijayanagar, Bangalore - 560040

Phone No. :

+919*********

OBJECTIVE

To excel in the field of VLSI Design with dedication, focus, hard work, and

to utilize my knowledge and skills to the growth of the organization and

also improve my knowledge.

ACADEMIC PROFILE

Texas A&M University, Kingsville

August 2012 - December 2013

Master of Science in Electrical Engineering

GPA:

4.0/4

Specialization in VLSI and Micro/Nano Electronics

Relevant Coursework:

. Principles of VLSI Circuit Design

. Analysis and Design of Analog Integrated Circuits

. Advanced Semiconductor Fundamentals

. Random Prototyping and ASIC Design

. Advanced Digital IC Design

Worked part time as Teaching Assistant in Electrical Engineering in guiding

under graduate students for the courses VLSI design and VHDL programming

courses during the period of November 2012 to November 2013

Completed my Research Thesis on "HSPICE Compatible Modeling and Performance

Analysis of Carbon Nanotube Field Effect Transistors"

PES Institute of Technology, Bangalore

August 2007 - June 2011

Bachelor of Engineering in Electronics and Communication Engineering

GPA: 6.66/10

Pre - University, Karnataka State P.U. Board

2007

Seshadripuram Composite Pre University College, Bengaluru

85.66%

SSLC, Karnataka State Board

2005

Sri Vani Education Centre, Bangalore

95.04%

WORK EXPERIENCE

HCL TECHNOLOGIES PVT LTD, Bangalore, INDIA

July 2011 - August 2012

Software Engineer

. Trained in Verilog and VHDL for Design and System Verilog for

Verification

. Worked on 10 Gbps Ethernet, AHB and AXI buses for implementation on

Virtex 6 FPGA.

. Worked in a Stereo Imaging Project for an Image Processing Japanese

Company "TAKATA" which involved a team of 4

. Worked on Xilinx's Virtex 6 and Altera's Cyclone 3 FPGA Boards and was

involved in Design and validation

. Successfully completed certification training on PERL

SEMINARS

* Presented a IEEE technical paper on "A Novel Approach for Traffic

Avoidance using Pre-Emptive concept" in the National Conference

"Computational Control Systems and Optimization" which was developed

from the project which I came up during my final semester of my under

graduation in 2011.

* Presented seminars on "Multi-rate Filter Banks", "Organic Light Emitting

Diodes" and "RFID Smartcards" during my Under Graduate course

* Seminars on "Carbon Nanotube Field Effect transistors" and "Stability on

Linear Feedback systems" during the course of MS at Texas A&M

University, Kingsville.

PROJECTS

. Mini Project on Mobile Detector - A practical mobile detector designed

using the principle of change in Radio Frequencies. This mobile detector

would be very useful in Educational institutions and other secured

places

. Final Semester Project - "Traffic Pre-emptive System" in the field of

Embedded Systems using facilities provided by NXP (Next Gen Philips). A

practical system is designed for avoiding traffic jams at the traffic

junctions in emergency situations without affecting normal traffic for

authorized emergency vehicles such as Ambulances, Police vehicles and

VIP escort vehicles by pre-empting the signal using RF communication

. Design and fabrication of 16-bit ALU - Complete ASIC flow was

implemented from Design till fabricated IC for a 16-bit ALU 500nm

Technology provided by MOSIS.

. License plate recognition - Based on the principle of image

segmentation, project was implemented for traffic signal junctions for

recognition license plate of automobiles which violate law. This project

was programmed in MATLAB using image processing toolbox

. Implementation of Ping Pong on FPGA board- Pong was implemented and

displayed on a monitor. This project was carried on Altera's Cyclone II

FPGA using VGA port.

COMPUTER SKILLS

Programming Languages: C, C++, Assembly Level Programming, Verilog, VHDL

and System Verilog

Software Tools: LT Spice, HSPICE, Matlab, Keil, Xilinx ISE, Altera's

Quartus & Modelsim, and Magic (VLSI Layout designing tool)

Scripting: Basic knowledge in PERL.

EXTRACURRICULAR ACTIVITIES

* National Cadet Corps Certificate 'A' training between 2002 - 2004

* Attended in plant training at Bharath Heavy Electricals limited (BHEL),

Bangalore INDIA, in the following departments:

1. Control Equipment (Main Assembly & System Testing)

2.Sub Assembly (PCB Assembly & Testing),

3. Semiconductors, Photovoltaic's, Traction system

4. Energy meters, SCADA, HVDC & Turbines

* Part of Organizing Committee of Inter-collegiate Sports and Cultural

Fest at PES Institute of Technology, Bangalore

* Won First Place in "Junk Yard Wars" in an Inter-College Competition

Conducted by PESIT which tests student's technical and creativity skills

* Took part in community service from Robotics Workshop at Texas A&M

University.

PERSONNAL INFORMATION

Gender: Male.

Marital status: Single.

Date of Birth: 30th January 1989.

Nationality: Indian.

Languages known: Kannada, English, Hindi and Sanskrit.

Hobbies: Philately, Trekking, Solving analytical and logical reasoning

problems, playing chess.

DECLARATION

I hereby solemnly declare that the information furnished above is true to

my knowledge.

TEJAS SHANMUKHA SWAMY



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