Software Engineer Design

Sijun Chen

*** ********* ******* #***, ***** Rock, TX 78665 404-***-**** ****.******@*****.***

Objective

To seek a full-time position in Software Engineering

Skills

Programming: C/C++, VHDL, Assembly, JAVA

Tools: Cadence, Quartus, MATLAB, ADS, COMSOL, Visual Studio

Intern Experiences

Techject, Atlanta, Georgia June 2013 - July 2013

Embedded Software Engineer

Mounted a tiny camera onto a flight machine and configured the camera using the SPI

protocol

Established the data transmission between the camera and the PIC33EP512 chip using I2C

protocol

Education

Georgia Institute of Technology, Atlanta, Georgia 2012.08-present

M.S in Electrical and Computer Engineering, Computer Science as Minor, GPA: 3.2/4.0

Shanghai Jiao Tong University (SJTU), Shanghai, China 2008.09-2012.08

B.E in Electrical and Computer Engineering, University of Michigan-Shanghai Jiao Tong University

Joint Institute (UMJI), GPA:3.6/4.0

Technical Projects

Design of a Five-stage Pipeline in C++, Georgia Tech 2012.09-2012.12

Implemented a multi-threaded five-stage pipeline including non-blocking cache and G-share

branch predictor using C++

Analyzed the performance and energy efficiency of the architecture

Design of a Smart Socket Networking System, SJTU 2011.06-2012.08

Team Leader

Established a dynamic wireless network among four sockets based on the Zigbee protocol

Design and built four smart sockets that can sense and transmit the information of current

and voltage values

C++ Programming Projects, SJTU 2009.05-2012.08

Game implementation: Aeroplane Chess game, Yahtzee and Twenty-one

Biology simulation: Simulated two-to-one multiple access nano-scale communication based

on ligand binding process in biology

Audio Equalizer Design in VHDL, Georgia Tech 2013.11-2013.12

Designed and implemented a FIR filter based audio equalizer

Designed and implemented three 40-tap FIR filters and a corresponding tap coefficient

generator in VHDL using window method

Low Noise Amplifier Design in ADS, Georgia Tech 2013.10-2013.12

Designed and implemented a two stage low noise amplifier using ADS

Simulated and modified the design to meet the desired design specifications

MEMS Design in Cadence and COMSOL, Georgia Tech 2013.09-2013.12

Designed a capacitive micro-accelerometer and a capacitive resonator using COMSOL

Implemented a swithed-capacitor circuit to realize the chopping technology and simulated

the noise and gain for an Op Amp in Cadence.

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