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Project Engineer

Location:
Chittoor, AP, India
Posted:
February 05, 2014

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Resume:

E.ASWINI

******.*******@*****.***

094********

CARRIER OBJECTIVES:

I would like to be a part of an organization where I could utilize and enhance my

knowledge, skills and talent and contribute to the success and help the organization to march

into the future.

POSITIVE TRAITS:

Adaptable to new environments.

Quick Learner.

Self-Motivated coupled with Confidence.

Possess untiring Enthusiasm.

Ability to work in-group as well as independently with minimal supervision.

ACADEMIC DETAILS:

Course Year Institution Percentage

N.B.K.R.I.S.T, Affiliated to

B.Tech 81.46

Sri Venkateshwara University

ECE 2013

(Nellore).

Intermediate Sri Chaitanya Junior Kalasala

89.90

2009

MPC (Chittoor).

Indian School of English

S.S.C 91.83

2007 (Chittoor).

TECHNICAL SKILLS:

Operating Systems : Windows 98/2000/7,Ubuntu

Programming Languages : C, MATLAB

Hardware programming language : 8086 Assembly Language Programming .

Hardware Description Language : Verilog HDL,Verilog PLI, VHDL basics.

CAD : Xilinx, Modelsim, Keil Compiler,

MinGw, Codeblocks.

Application Softwares : Microsoft Office 2007,2010,

Adobe Dreamweaver, Adobe Photoshop.

ACADEMIC PROJECT:

“A BIST TPG for Low Power Dissipation

and High Fault Coverage ” Domain : Low Power

VLSI

This five member project deals with a Software Tools : Mentor

low hardware overhead test pattern generator Graphics ModelSim V6.5,

(TPG) for scan-based Built-In Self-Test (BIST) Xilinx ISE 8.1I

that can reduce switching activity in circuits

under test (CUTs) during BIST and also

Role in the Project:

achieve very high fault coverage with

Project Leader

reasonable lengths of test sequences.

EXTRA CURRICULARS:

Achievements:

Secured first prize in Poster Presentation on HACKING VIA GPRS UNCOVERED in

the National Level Technical Symposium at Vaishnavi Institute of Technology.

Won second prize in Poster Presentation on HACKING in the National Level

Technical Symposium at N.B.K.I.S.T.

Secured first prize in Debate entitled INDIAN STRATEGY TOWARDS

TERRORISM in the National Level Technical Symposium at N.B.K.I.S.T.

Won third prize in the Paper Presentation on EMBEDDED SYSTEMS in a National

Level Technical Symposium conducted at QUBA College of Engineering and

Technology.

Won Prizes in Town Level Elocution, Essay Writing and Quiz competitions during my

Schooling.

Secured first prize in Technical Quiz, Paper Presentation, JAM conducted by E.C.E

Association at N.B.K.R.I.S.T.

Bagged first prize in A Good Word in English and third prize in JAM c onducted by

IETE Association at N.B.K.R.I.S.T.

Participations:

Attended EDUCATORS DAY 2012 in Chennai conducted by NATIONAL

INSTRUMENTSTM.

Participated in the workshop on MATLAB at IIT Madras.

Participated in LOOPHOLE-ETHICAL HACKING Workshop in the Chakravyuh

event conducted by Kyrion Digital Securities (P) Ltd.

Successfully completed SIXTHSENSE BOTZ workshop on Image Processing based

Robotics involving Colour Recognition and Gesture Control conducted by ARK Techno

solutions at GPREC.

Participated in ROBO MANIA in a National Level Technical Fest organized at

GPREC.

Presented papers in various National Level Symposiums.

WORK EXPERIENCE:

COMPANY NAME POSITION NATURE OF WORK

R & D Engineer Digital designing with Verilog

INTELLECT TECH CORP PVT.LTD,

Yellareddyguda, Hyderabad-73.

Project : Domain : FPGA Designing

MIL-STD 1553 IP Core development:

MIL-STD-1553 is a DOD Military Technical skills : Verilog HDL,

(MIL) Standard (STD), which defines both the Verilog PLI,

Mechanical, Electrical, and Functional Tender Bidding,

characteristics. MIL 1553 uses a Balanced CLI,API,Shell

(Differential) interface. The interface is dual-

redundant with between 2 and 32 interface IDE : Xilinx 14.2,

devices on the bus. The multiplex data bus CodeBlocks 10.5,

system shall function asynchron ously in a MinGw,

command response mode, and transmission Microsoft Visual

shall occur in a half-duplex manner. Studio 2008.

PERSONAL TRIVIA:

Mr.S.V.Elumalai (garu)

Father’s Name

Mrs.E.Revathi (garu)

Mother’s Name

12-10-1991

Date of Birth

Surfing,Cooking,Playing Chess

Hobbies

English, Telugu,Tamil,Hindi

Languages Known

#15-2416,

John’s Garden,

Chittoor-517001,

Address for communication

Andhra Pradesh.

DECLARATION:

I hereby declare that all the above furnished information is true to the best of my

knowledge.

Place: Hyderabad

Date: E.ASWINI



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