Front End Digital VLSI Design, ASIC Design, FPGA bsed Design
Resume:
SURAJ KUMAR DHANUKA
Final Year Student at Vellore Institute of Technology (VIT University), Vellore
E-mail:acbvra@r.postjobfree.com Mob: +917*********
CAREER OBJECTIVE
Seeking for a challenging position in a semiconductor company whereby I will utilize my earned
knowledge to develop my technical expertise and aligning them with company goals.
EDUCATION QUALIFICATION
Examination School/University Year Marks
B. Tech 8.37(CGPA)
2010-2014
Vellore Institute Of Technology (ECE)
12th 86.8%
2010
DAV Kalinga,(CBSE)
10th 89.14%
2008
Saint Lawrence School,(ICSE)
SKILLS
Technical:
• Design emulation on FPGA (Xilinx Spartan 3, Xilinx Spartan3E) and CPLD (only XC9572).
• RTL Synthesis and Verification; Design of IP core, Simulation and Digital Logic Synthesis.
• Xilinx ISE Simulator, Modelsim Simulator.
• Placing, Routing, Bit streams Generation (Bit file - .bit) and Implementation using Xilinx
IMPACT Tool.
• Good understanding of the ASIC and FPGA design flow and Digital Design.
• Expertise in RTL Coding, FSM based design, Code Coverage, Functional Coverage and
Synthesis.
• Hands on important software’s like PSPICE, Kiel, Eagle
• Proficient in Microsoft Office
• Work experience in Operating System like Windows XP, Windows Vista, Windows 7,
Windows 8, Linux
Languages:
• Language Proficiency : Hindi, English, Oriya, Basic French
• HDLs: Verilog, VHDL, and knowledge of System Verilog
• EDA Tool: Modelsim, ISE Design Suite, NClaunch, RC compiler
• Scripting language: Tcl/tk (learning)
• Programming skills: C, C++, Linux, Assembly language, Embedded C, MATLAB
Interpersonal:
Leadership:
Guiding team and representing my team at meeting.
Interpersonal
• Team work
• Conflict resolution and problem solving
• Motivating
Analysing design faults and bugs as well as debugging them
Experience of documentation of presenting required projects design and outcomes
Excellent coordinating ability in engineering projects
Organising and proper time management skills
Logically thinking and analysing capability
Ability to work under deadline and pressure.
HOBBIES AND EXTRA CURRICULAR
Teaching assistance for the course VLSI design at VIT University under Dr. Vigneswaran for a
semester
Active member of Event Management Club of VIT University.
Organized an event named BUG BUSTER in National level symposium Scintilla.
Participated and won various Robotics events being Member of Robotics Club VIT University
Sports: Badminton and Basketball
Reading and browsing about recent technological trends.
ACHIEVEMENTS
Certificate of Appreciation for supporting FPGA lab activities at St. Margaret Engineering
College, Neemrana, Rajasthan.
Training on VLSI DESIGN and FPGA DESIGN & SYNTHESIS from DKOP LABS Pvt.
Ltd.
Training in PCB DESIGN organized at VIT Chennai.
Certificate of Participation in Sixth Advanced Training Camp in Chemistry for Olympiads
and IIT Exams by Orissa Chemical Society.
Certificate of Merit in the field of Robotics at SRM and VIT University.
Participation Certificate in various intra and inter college events in the field of coding and
electronics.
RESEARCH
A Multi Parametric Optimization Based Novel Approach For An Efficient Design Space
Exploration For ASIC Design(IEEE)
o Description: This paper presents a novel approach to achieve a Pareto optimal solution
for this design space exploration in minimum possible design time using Greedy
Algorithm and Priority Factor (PF) for power and timing analysis.
Responsibilities: Implementing the novel approach on various benchmarks and finding its
o
optimal solution.
Cryptographic Algorithm Optimization
EDA Tools and Environment: ISE Design Suite, Cadence ( NClaunch, RC and Encounter)
o
o Description: This paper presents design space exploration of the hummingbird
cryptographic algorithm and the algorithmic level optimisation of the same. It also
shows a comparative analysis of different models of substitution box, cipher block and
encryption block.
o Responsibilities: Implementing the various architectures using Verilog HDL
independently and functionally verifying it.
PROJECT
Hardware Implementation of Discrete Wavelet Transform
Tools: ISE Design Suite
o
Description: This project shows how we can design and implement a Discrete
o
Wavelet Transform and verify its functionality in Matlab.
Hardware Implementation of Sobel Edge Detection
Tools: ISE Design Suite
o
Description: This project shows how we can design and implement a edge detection
o
technique and verify its functionality in Matlab.
Designing and functional verification of FFT and IDFT Processor
Tools: ISE Design Suite
o
Description: This project shows how we can design and implement a real time 8point
o
FFT and IDFT with complex arithmetic operation (multiplication, addition and
subtraction) using IEEE 754 floating standards.
Hardware Implementation of Hashing algorithm SHA1
Tools: ISE Design Suite
o
Hardware: Xilinx device (Spartan3s200)
o
Description: This project show how a Hashing algorithm can be described in Verilog
o
and implemented in reconfigurable hardware. It is architecture is designed in such a
way that it takes an input of 16 bits at every clock cycle and finally gives a message
digest of 160 bits at the end of 80 clock cycles.
Hardware Implementation of VGA Controller, PS2 Controller, Stopwatch and Traffic
light controller
Tools: ISE Design Suite, Digilent Adept System
o
Hardware: Digilent Nexys2 Board(Spartan3E),CPLD XC9572
o
Implementing a Cryptographic Algorithm and testing it in a High level Environment.
Tools: ISE Design Suite, Matlab
o
Description: This project show how a cryptographic algorithm can be described in
o
Verilog and implemented in reconfigurable hardware and not lose the ability to be
tested in a high-level environment like Simulink.
Hardware implementation of orthogonal error detection and correction algorithm
Tools: ISE Design Suite
o
Hardware: Xilinx device (Spartan3s200)
o
Design and functional verification of UART, Vending Machine Controller and Elevator
Controller
Tools: ISE Design Suite
o
(Worked in team projects like Temperature controlled device and voltmeter using microcontroller
8051, Remote Control Car, Obstacle, Speech Recognition system using Matlab and HTK,FM Radio,
Music transfer through Infrared communication, Audio amplifier, Automatic street light switching,
Water level Indicator)
REFERENCE
Mr. Devender Khari, CEO & Director, Business development at DKOP LABS Pvt. Ltd
Email : acbvra@r.postjobfree.com Mob No:099********
Contact this candidate