Engineer Project

Rishi Gautam Tode Mobile : +91-727**-*****

Project Engineer Email : **********@*****.***

WIPRO TECHNOLOGIES

Career Objective

To succeed in an environment of growth and excellence and earn a job which provides me job satisfaction

and self-development and help me achieve personal as well as organizational goals.

Work Experience

WIPRO TECHNOLOGIES Aug

2011 – Present

• 2.4 years’ experience in VLSI verification

• Development of Verification components for verification of SOC Blocks in System Verilog [UVM].

• Active role in Verification Guide/Plan, and Coverage analysis.

• Working knowledge of AMBA (AXI, AHB and APB) protocols.

• Integration and usage of Verification IPs from Synopsys.

• Code Coverage/ Functional Coverage analysis along with Assertions.

Major Project

Title: Mobile peripheral SoC verification

• Mobile peripheral device that does high speed file/data transfer without

Project

intervention of the host CPU.

Description

• Has SD3.0 / SDIO3.0/eMMC4.5Host Controller with a USB 2.0 (High

Speed) (OTG) interface.

• This device has two SD/eMMC Host Contorollers, a USB OTG Controller,

ARM Cortex™-M3, SRAM for working area and UART / SPI / I2C serial

interface.

Role VLSI ENGINEER Team Size: 12

• Owned a module for UART and I2C

Responsibility

• Coded wrapper for UART and I2C VIP which are in VMM to connect to

UVM based environment.

• UART/I2C scoreboards and Interrupt sequence

• Testcases for UART, I2C, WDT and CM3

Skill Set SYSTEM VERILOG [UVM] and EDA TOOL[SYNOPSYS-VCS]

Title: Verification of communication pathway between host SoC and peripheral devices

• Communication pathway between the host SoC and the peripheral devices .

Project

• Consists of a collection of PCIe 2 endpoint Functions, connected to the PCIe

Description

endpoint via the HBIB.

• Each endpoint Function serves a particular function in the system such as

storage or Internet connectivity.

Role VLSI ENGINEER Team Size: 8

Rishi Gautam Tode Mobile : +91-727**-*****

Project Engineer Email : **********@*****.***

WIPRO TECHNOLOGIES

• Owned a module for message signal generation environment modification

Responsibility

• Coverage analysis along with exclusion file

• Testcases for message signal generation module

Skill Set SYSTEM VERILOG [VMM]and VLSI TOOLS[VCS]

Internal Project

Title: SPI IP verification using wishbone interface

• DUT works as simple parallel to serial converter.

Project

• Consists of a Wishbone interface on one side and SPI interface on another side of

Description

DUT

• Also consist of a SPI slave model to recieve the data from DUT.

Role VLSI ENGINEER

Responsibility • Developed verification plan and testplan for the project

• Coded UVM based environment (wishbone and SPI monitors, scoreboards,

assertion, functional coverage).

• Coded SPI slave model to revieve/send data to/from DUT

• Coded testcases for SPI scenarios.

Skill Set SYSTEM VERILOG [UVM] and EDA TOOL[CADENCE-INCISIVE]

Technical Skills

• EDA Tool : Synopsys-VCS, Cadence-Incisive

• Programming Languages: System Verilog

• Methodology : UVM

• OS: : Working knowledge of Windows XP, Vista, 7, Linux/Unix

Educational qualifications

Degree Board/University Institute Year Percentage

B.E. (Electronics Dr. Babasaheb Ambedkar MBES College of Engineering, 2011 62.35

& Telecomm) Marathwada University Ambajogai

Intermediate/+2 Maharashtra State Board Jupiter High School, Nagpur 2007 53.50

Matriculation Maharashtra State Board Mount Carmel Convent High 2005 76.13

Rishi Gautam Tode Mobile : +91-727**-*****

Project Engineer Email : **********@*****.***

WIPRO TECHNOLOGIES

School, Chandrapur

Area of Interest

• IP Verification

• SoC Verification

Achievement and Extra Curricular

• Winner of Wipro PE&MS Fun Fiesta Chess competition

• Won Best Design Award for Robowar at Excelsior’09 held at Sinhgad College of Engineering, Pune

• Organized a robotics workshop at MBES College of Engineering, Ambajogai for more than 100

students

Hobbies and Interest

• Organizing and Managing Events

• Capturing human emotions in my digital camera

• Tweaking and troubleshooting of gadgets, computer hardware, operating systems & softwares

• Drawing sketch of still objects

• Swimming and playing Chess

Personal Information

• Address : C3-Vanashree Apartments, Vidnyan-Nagar, Bavdhan, Pune-411021

• DoB : 15 August 1988

• Passport Validity : till 07/02/2022

Contact this candidate