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Design Project

Location:
Bangalore, KA, India
Posted:
December 18, 2013

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Resume:

CH SRINIVASA SUJITHKUMAR

“Address:H.No.**,**th Main,6st Cross,BTM 1st Stage Bangalore 991-***-**** **************@*****.***

Objective

A Design and Verification Engineer position in an organization seeking committed and fast learner with knowledge

of Verilog, test benches & verification techniques, along with hands on experience on Cadence tools.

.

Skills Summary

1. HDL Coding, Verilog 5. Cadence Tool Suite 9. Linux

2. Logic Design 6. RTL Complier 10. Simvision

3. Finite State Machine 7. NCVERILOG 11. Xilinx ISE

4. VHDL 8. System 12. Model sim altera

verilog(Basics)

Project Experience

Mini Projects – Advanced Diploma in VLSI Design

8 Bit Serial ALU Design

Sequential Multiplier Design

Stop Watch Design

Major Project – M.Tech VLSI Design Engineering

Efficient Min Sum Algorithm For High Throughput Non Binary Ldpc Decoder.

1. This project describes the simplified min sum algorithm, which only has less performance loss against the

existing algorithm, a highly efficient decoder architecture is developed. Compared with the existing works, this

design has three advantages. First, the design increases the parallelism and throughput of the decoder. The

implementation results for the decoder show high throughput.Second, this design saves memory usage . Third, this

design increases area efficiency..

Major Project – B.Tech Electronics & Communication Engineering

Microcontroller Implementation Of Neural Network Based Hurdle Avoidance Control car like

Robot

2. This project describes the implementation of neural network based hurdle avoidance controller for a car like

Robot using low cost micro controller .This technique is used in cars to avoid accidents.

Education

M.Tech in VLSI DESIGN, June 2013 SRM UNIVERSITY, CHENNAI Percentage: 72.57

B.Tech in Electronics and Communication Engineering, June 2011 Percentage: 67.51

JNTUA,ANDHRA PRADESH

Class XII N.J College, Board of Intermediate Education, A.P Percentage: 87.80

Chetan Bagwat

Class X Govt School,Board of Secondary Education, A.P Percentage: 80.00

T 57 Hill View Residency Bangalore 560066 (91-973**-***** *******@*****.***

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