IAN M. ROARTY

**** **** ****

Durham, North Carolina 27703

919-***-**** (home)

919-***-**** (cell)

email: acbpl1@r.postjobfree.com

Summary

Printed circuit board designer with over 25 years of experience.

Experienced in the design and release of PCB's and design

practices utilizing the following tools:

Cadence's Allegro 16.5, Concept, Library symbol build, Valor,

ECAM350 Gerber and Circuit Space. Designed multi-layer high

density high speed digital boards for IBM.

WORK EXPERIENCE

IBM Corporation thru CTG as a contractor

RTP, NC

SR PCB Designer

2003 - 2013

Designing PCB's for high-end servers for the eServer group.

Includes products in the xSeries, Blades, & Blade Center back-

panel product groups. Responsible for all areas of the pcb layout

from the initial floor planning/stackup definitions to production

build for complex boards with up to 28 layers, 10K components

(with a varying mixture of 1200+ pin BGA's, CSP's, power, analog,

& high-end connectors). Extensive experience

with Allegro's Constraint Manager for physical, spacing and

electrical requirements such as propagation delays, min/max

lengths and phase tolerances. Very familiar with laying out the

power and the regulators.

Designs include a variety of technology that includes the latest

high-end 64-bit Intel and AMD processors, PCIe, ethernet, USB, and

SCSI/SAS and DDR3 and DDR4.

JABIL MANUFACTURING

Cary, NC

SR PCB Designer

2001 - 2002

Designed various complex printed circuit boards using Cadence

Allegro 14.1 tool-set on NT platform. Used 3rd party netlist for

input. Products were DSL modems and medical systems. Multi-layer

boards (10-20 layers), high density, high speed digital with

critical nets (controlled impedance, min/max and matched lengths,

differential pairs, clocks and ground shielding, etc.). Extensive

use of Allegro design constraints,

properties and tech file for proper design rules.

IBM CORPORATION

RTP, NC

SR PCB Designer

1992 - 2001

Designed various complex printed circuit boards for IBM high-

speed telecommunications, servers, personal computers, ethernet,

token-ring and boards for chips being developed. Multi-layer

technology (10 -20 layers) high-density, high-speed digital, some

analog, some with power supply areas on the board. Most boards

with critical nets (controlled impedance, min/max and matched

lengths, differential pairs, clocks and ground shielding, etc.)

requiring design constraints, properties and tech file to be

properly set for the design rules. Built schematic symbols and

component parts for library, checked gerber data using ADI tool,

completed some designs utilizing the

Specctra router, used buried capacitors for token-ring

designs. Used Cadence Allegro 14.1/Concept/Specctra tool-set on a

Unix platform.

Marketing Support Rep

1987 - 1992

Supported internal IBM sites with IBM's printed circuit board

design tool (CBDS/Unicad). Supported, installed, demonstrated and

benchmarked (CBDS/UniCad) to external customers such as SCI, AVEX,

Peavey Electronics, Motorola, Allied Signal,

Pitney Bowels, etc. Used ViewLogic for logic entree. Worked on

Catia interface.

PCB Designer

1981 - 1987

Designed printed circuit boards using both of IBM's mainframe

circuit board design systems, CBDS/UniCad and EDS/CCDS for various

Engineering groups.

EDUCATIONAL BACKGROUND

Cadence Allegro/Concept/Library

Cooper Chyan Technologies (CCT/Specctra)

Valor gerber checker

Circuit Space

Northern Telecom's Circuit Board Design System (CBDS/UniCad)

Sanmina classes on manufacturing, assembly and test guidelines

IBM classes on basic AC/DC electricity, digital electronics and

EMC.

IBM volunteer classes, speed-reading, self-improvement,..etc.

AIX/UNIX/DOS/VM/MVS/WINDOWS

Contact this candidate