Software Engineer Project

TWINKLE DUGAR

E-mail: ************@*****.***

Contact: +91-973*******(M)

Objective

To build a career in a highly motivated environment, to test my potential

and bring out the best by working with dedication to achieve the set goal.

Professional Experience

CURRENT EMPLOYER

< The objective of the project was to Automate and Validate new features

for ZebOS release. ZebOS provides a scalable, robust and standards-

based Layer 2 and Layer 3 carrier class-routing and Switching

solution. This internship project involved understanding 802.1x, OSPF

& PIM protocols, development of automated test scripts in the whole

validation process of various protocol features.

Designation: Associate Software Engineer

Duration: 4 months (1 Aug-2013 till present)

Organization: ip infusion Software India pvt. ltd

Tools Used: C,TCL,GDB,SWIG,Putty,CQ,

Operating system: Windows, Linux

PERVIOUS EMPLOYER

< Intern at ip infusion Software India pvt. Ltd from (15 Jan 2013 - 31 July

2013)

< Automation of TCL scripts.

Academics

> B.E in Electronics and telecommunications from PESIT, Bangalore in 2013

with a CGPA of 7.08

> Intermediate (12th) from Shree Jain Vidyalaya,Kolkata in 2009 with 72%.

> Matriculation (10th) from Shree Jain Vidyalaya,Kolkata in 2007 with 72%

Project Undertaken

. INTEL-PESIT INNOVATION PROJECTS

Description: The goal of this project is to develop an adaptive speech Beam

former. The beam former is designed to pick out a speaker in a noisy

environment

. RECONFIGURABLE COMPUTING

Description : a failure recognition module that reconfigures upon

failure.

. FPGA Implementation of Mitchell log Algorithm

Description : understanding Mitchell log and implementing on

FPGA And generating the Iterative

error

correction block through pipelining.

Industrial Trainings

Undertaken

> NAL

Studied on "SERVO-CONTROLLED HYDRAULIC CONTROL"

Duration-20 days.

Status -Completed

> BSNL

Summer Training Course.

Duration-2 weeks.

Status -Completed

Technical Skills

> Language : C language,Verilog,TCL

> Telecom Skills : Networking.

> Digital Design : Digital Logic,8086

> Tool : Xilinx, Plan Ahead,

Tanner EDA,MASM,KIEL

Declaration

I, hereby, declare that all the information furnished above is true to the

best of my knowledge and belief.

Place: Bangalore

(Twinkle Dugar)

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