N Raghavendra Gupta
Hardware Board Design and Signal Integrity Engineer
*****.***@*****.***
Engineer
Professional Objective:
To become a contributing Hardware Engineer, in an organization for its success, by
applying my knowledge, through innovative solutions, and constantly updating my skills.
Profession synopsis:
• Over 3+ years experience in Hardware Board design. Expertise in Schematic design using
tools, Simulation and Hardware Design Flow.
• Experience in Functional, Environmental and EMC/EMI testing.
• Extensive experience in OrCAD, DxDesigner, Concept HDLand Altium Schematic design
tools
• Thorough knowledge of I2C, SPI, USB, RS232 and RS485 interfaces.
• Extensive Experience in working with the Simulation tools like PSPICE, AMS, LTSPICE,
Hyperlynx and TINA.
• Experience in Signal integrity Analysis.
• Good debugging skills.
• Ability to adopt new technologies within short period.
• Highly motivated with good communication skills.
• Effective planning and organizational skills.
• Ability to successfully manage multiple priorities and assignments.
Educational Qualifications:
● Bachelor of Technology in Electronics and Communication Engineering, 2010, from
J.N.T.U Anantapur with an aggregate of 71.1%.
● Intermediate, Sri Satya Sai Junior College, Board of Intermediate Education, 2006,
91.5%.
● SSC, Jeevananda English Medium High School, Board of Secondary Education, 2004,
75%.
Experience Summary
• Organization : HCL Technologies Ltd
Duration : July 2010 – Present
Designation : Member Technical Staff
Project Details
Project #
Project Name : NEW DA
Client : Panasonic
Team Size :6
Role : Design Engineer
Environment : OrCAD, PSPICE, Hyperlynx, QNX, Windows 7
Description:
New DA is an automotive infotainment system designed for car dash board. The
passenger will have the possibility for playing CD/DVD, USB Data and Mobile data.The passenger
interacts via multi touch capacitive screen. The USB can be used for playing any video or audio
content or charging external personal devices.
Responsibilities:
• Requirement capturing
• Component Selection and Schematics Designing
• Netlist releasing and verification
• WCCA and FMEA
• Pre and Post Signal integrity Analysis.
• Guiding PCB team for Layout
• Gerber Releasing
Project #
Project Name : RC MPU
Client : Rockwell Collins
Team Size :8
Role : Design Engineer
Environment : Hyperlynx, OrCAD, PSPICE, QNX, Windows 7
Description:
Media Player Unit (MPU) is an In-flight entertainment system designed for Passenger’s
interactive entertainment. At each passenger seat, MPU is installed allowing interactive
entertainment control by the passenger .The passenger interacts with the MPU via a multi-touch
screen display .The USB port can be used as a content playback source for passenger personal
digital audio and audio/video files as well as a power source for charging personal devices. The
MPU provides all of the functionality expected from a personal digital media player (locally playing
audio/video, games and other applications and the MPU is capable of receiving a limited number
of content streams sent over the IFE network. A common Flight Attendant Control Panel (FACP) is
used to control the In-Seat systems.
Responsibilities:
• Schematics Designing
• Netlist releasing and verification
• Pre-layout and Post layout Signal Integrity analysis
• Guiding PCB team for Layout
• DVT for the designed board for all the interfaces
• Environmental and EMI/EMC Testing.
Project #
Project Name : HS Tanker
Client : Hamilton Sundstrand
Team Size :4
Role : Technical Analyst
Environment : Concept HDL16.3, Windows XP
Description:
These GCU (Generator Control Unit) and BPCU (Bus Power Control Unit) control units are
used for controlling the aircraft power supply generation and distribution. This power supply
comprises of three sets of GCU & BPCU modules named as A2, A3 and A4. We have developed
3 tester boxes for A2,A3 & A4 to test each module individually before connecting all three sets
together. These include a locally generated variable 3 phase power supply (115 VAC) to test the
fault detection circuits of GCU & BPCU, pulse and delay generation circuits to start the
initialization, handshaking signals between the modules, switches to give inputs, LED’s & Lamps
to monitor various output signals of the modules.
Responsibilities:
• Symbol creation and Verification.
• Schematics designing and verification.
• Netlist releasing.
• BOM creation and verification.
• Component Compatibility Analysis.
• Stress Analysis and Derating Analysis
Project #
Project Name : FLIR Morpheus
Client : FLIR
Team Size :6
Role : Technical Staff
Environment : DxDesigner 2005, Windows XP
Description:
FLIR Morpheus is thermal image camera. The images taken by this camera are sent
through Wi-Fi module which is built inside the camera. This project contains three boards Main
Board, connector Board and Power Board.
In this project I involved in Main Board and Power board Designing sections. The main
board contains the Wi-Fi module which transmits the data to the user. Power board provides the
power to other boards.
Responsibilities:
• Block level approach of Hardware design
• Symbol creation and Verification.
• Schematics designing and verification.
• Netlist releasing.
• BOM creation and verification.
• Worst Case Analysis.
Project #
Project Name : Analog Front End for Ultrasound System
Client : Texas Instruments
Team Size :4
Role : Technical Staff
Environment : OrCAD16.2, Windows XP
Description:
AFE Board transmits a signal and receives reflected signal, the received signal is
processed through a TGA and then this analog signal is converted into digital signal through ADC.
These whole is controlled by using FPGA. This project is for Medical Domain Application (for
Scanning).
Responsibilities:
• Symbol creation and Verification.
• Schematics designing and verification.
• Netlist releasing.
• BOM creation and verification.
Personal Details
Name : N Raghavendra Gupta
Father’s name : M Mallikarjuna Gupta
Date of birth : 6th Nov 1988
Gender : Male
Marital status : Single
Languages known : English, Telugu & Tamil
Declaration
I hereby declare that the above furnished information is true and correct to the best of my
knowledge.
(N Raghavendra Gupta)