Project Pvt Ltd
Resume:
ROHAN P PATIL Mobile No: +91-944*******
(BE Telecommunication) E-mail: ***************@*****.***
CAREER OBJECTIVE
To seek a challenging position in a progressive organization that gives me challenges and opportunities to
enhance my knowledge, there by accomplishing both companies and my personal goals.
PROFESSIONAL SUMMARY
3+ years of experience in Communications Engineering
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Experience in Architecture Specific embedded C and Fixed point C coding (Matlab floating point to fixed
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point conversion)
Experience in VLIW DSP Assembly coding ( low level programming) and debugging skills
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Experience in firmware development of Digital TV standard for a SIMD VLIW processor
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Experience in complexity analysis and optimizing program and data memory of modules
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Experience in preparing design and Interface documents
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Experience in development of 3GPP WCDMA physical layer
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Experience in testing and validation of Saankhya Labs Compiler and Assembler
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Experience in handling Real Time Spectrum Analyzer, Digital Oscilloscope and other Lab instrument
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Experience in automating activities using Perl, Tcl and Shell scripting
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TECHNICAL SKILLS
Languages C, Embedded C coding, VLIW Assembly Coding
Utilities/Tools Visual studio 2012, MatLab Saankhya Labs compiler, GDB, simulator
Other Tools Cygwin, CVS, Bugzilla, DIA
Operating Systems Linux, Windows 98/XP, Windows 7
Domain Specific
DVB-T, WCDMA REL-99, HSDPA
ACADEMIC RECORDS
B.E – Telecommunication Percentage – 68.45
KLE's College of Engg and Tech (VTU), Belgaum Aug 2006 – May 2009
Diploma - Electronics & Communications Percentage – 70.35
Gomatesh Polytechnic (DTE), Belgaum July 2003 – May 2006
PROFESSIONAL EXPERIENCE
Company: Saankhya Labs Pvt Ltd, Bangalore
Designation: Member Technical Staff June 2012 - Till date
Project Title: HSPA downlink Receiver. Mar 2013 - Till date
Description: Development a Receiver C model for HSDPA downlink.
Responsibilities:
• Development of C code and testing the bit rate processing(BRP) modules HS-SCCH decoder, Interleaver,
Rate Matcher, Scrambling code generation, CRC etc.
• Development of C code and testing the chip rate processing(CRP) module Cell Search process.
• Worked on defining Instruction Set Assembler(ISA) for development of WCDMA Physical layer.
• Prepared design document and documentation on complexity analysis.
Project Title: Generic RS decoder. Jan 2013 - Feb 2013
Description: RS codes are block-based error-correcting mechanism used in digital transmission and storage.
Responsibilities:
• Development of assembly code for Generic Reed Solomon (RS) decoder to support all the TV standards
like DVB-T, ATSC, ATSC-MH and Universal Cable Standard.
• Integration and testing on in house Pruthvi chip.
Project Title: Tablet to TV and IP over coax for Consumer Electronic Show(CES) Dec 2012 - Dec 2012
Description: Application of in house Pruthvi Tx and Rx in Tablet to TV and IP over coax project.
Responsibilities:
• Development of assembly code to support Null packet insertion for DVBT, ISDBT and Cable-B
Modulator standard for Tablet to TV project .
• Support for IP over coax project.
Project Title: Modulator for DVB-T standard. July 2012 - Nov 2012
Description: Developing a Transmitter model for DVB-T standard.
Responsibilities:
• Developed C code and ASM firmware for Bit interleaver, convolution encoder and some utility kernels.
• Integration of modules related to Signal Processing, Viterbi and Signal conditioning CPU.
• Testing and validation on Pruthvi chip.
• Reduced the code loading time by generating LUTs on the fly.
• Parameter configuration parsing according to DVBT Register Spec.
• Documentation on complexity and signal flow for all the CPU's.
Company: Vayavya Labs Pvt Ltd, Bangalore
Designation: Software Engineer Aug 2011 - June 2012
Client: Saankhya Labs Pvt Ltd, Bangalore. Mar 2012 - June 2012
Project Title: GI averaging, variance and channel detection in AWGN case in for DVBT demodulator.
Description: Developing a Receiver model for DVB-T standard.
Responsibilities:
• Developed C and ASM code for GI averaging, variance and channel detection in AWGN case for Signal
Processing CPU.
• Integration and testing in whole DVBT demodulator chain.
Client: Saankhya Labs Pvt Ltd, Bangalore. Aug 2011 - Mar 2012
Project Title: Testing and validation of Saankhya Labs Tool chain.
Description: Testing and Validation of tools such as JRE tool, Compiler Binutils and GDB.
Responsibilities:
• Developed the test cases for Validation of Saankhya Labs JRE tool, C compiler, Binutils and GDB for
DSP Processor.
• Involved in GDB scripting to make GDB commands equivalent to SDB commands.
• Init code for Signal conditioning CPU common for all the standard for JRE tool.
Company: ADA (Aeronautical Development Agency), Bangalore.
Designation: Electronic Engineer Aug 2010 - July 2011
Worked as a Quality Analyst (QA) in DGAQA (Director General Aeronautical Quality Assurance) for
Electrical and Avionics system for Light Combat Aircraft (LCA) project.
ACADEMIC PROJECT:
Project Title: Tri-Band Cell Phone Jammer.
This proposed work is designed for the simultaneous blocking of the cell phones using GSM, DCS
and CDMA technologies. It is mainly intended to prevent the usage of mobile phones in places inside its
coverage without interfering with the communication channels outside its range, thus providing a cheap and
reliable method for blocking mobile communication in the required restricted areas only.
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