Engineer Design

S. Russell Rapport, BSEE

***** ****** **** ***.***

512-***-****

Austin, Texas 78758

**************@*****.***

Summary

I am an Electrical Engineer with 14 patents experienced in post-silicon

validation, development, and test. Much of my later work has involved the

DRAM interface. My projects finish on time and under budget.

CORE

COMPETENCIES

DDR3/DDR2/LPDDR2/Flash Post Silicon Validation Test Hardware/Software

Design

Use/parse TAP debug tools PSPICE, HSPICE, IBIS RAID/SAS/PCIe/USB

Cadence, Orcad, Mentor Windows/UNIX/Linux Python, PERL, C#

DSP For Test Customer Support Tech/Spec Writing

Agilent/Tek scopes/logic Altera/Xilinx FPGA/CPLD Debug

analyzer

Test Plan Product Design Thermal Testing

modify/implementation

PROFESSIONAL EXPERIENCE

Dell Round Rock, Tx. June 2012 - March 2013

Test/Design Engineer RAID group (contract)

. Identified fix for PERC7 RAID DDR2 field failures.

. DDR3/DDR2 validation and qualification. Modified & implemented test plan.

. Found and corrected Altera CLPD errors.

. Improved SI on HBA RAID card

.

Intel Austin, Tx. Oct 2011 - May 2012

SPECV Validation Engineer - (contract)

. Performed LPDDR2 and southbridge signal validation on Atom SOC processor.

. Wrote GUIs in C#, Python with ITP (TAP) & serial port windows, scope

drivers, register interfaces, 3 level dropdown menus. Set SOC in proper

state, trigger scope, collected and displayed data in Excel.

. Discovered workaround for Tek DSA70000 logic analyzer - fully decode

"don't cares".

. Measured and/modified scripts for LPDDR2 interface, power rail

measurements, timing for eMMC, SDIO interfaces

. Captured glitch on scope, later fixed in product.

.

Advanced Micro Devices, Austin, Tx. Mar 2010 - Feb 2011

PC Systems Test/Validation Engineer - Platform Silicon (contract)

. Found and corrected desktop platform error, received 2 cash awards for

finding BIOS impedance calculation error and termination timing problem.

. Found and fixed power supply problem on platform by changing component,

saving board respin.

. Executed test plans, analyzed DDR3 interface issues, wrote and executed

PERL scripts, automated data analysis.

. Wrote PERL script to parse HDTOUT text file and print DDR3 SPD parameter

summary of each DIMM slot in platform, verifying each test was run with

correct DIMMs.

Honeywell Corporation, Glendale, Arizona Apr - Nov 2008

Test Engineer (contract)

. Designed test cards for Honeywell's Pathway satellite automated test

station. I drafted a preliminary design for the Orion VMC computer system

development station.

Staktek (Entorian) Corporation, Austin, Texas Feb 2002 - Aug 2007

Senior Design Engineer II

. Created electrical design for highest density secure digital (SD) flash

memory card

. Created electrical design for highest density flash and DRAM memory

stacks, the main source of company revenue.

. Wrote most product specifications.

. Created several tests, including HW and SW for automated thermal tester

(theta JA), hipot,

. FPGA test (HW only), built-in tests, leakage, and others.

. Invented an alternative to fully buffered DIMM, resulting in two patents.

. Member of memory standards body Joint Electrical Device Engineering

Council (JEDEC).

Surgient Networks, Austin, Texas Feb 2001 - Feb 2002

Test Engineer

. Wrote three tests intended to catch failures in hardware system.

. Wrote software for custom bed-of-nails tester designed to provide greater

than 99% coverage.

. Developed stand-alone shipping test designed to verify correct software

in each product.

. Developed unique script language and automatic script generator to write

test programs.

. Included data collection and analysis feature using SQL.

Staktek Corporation, Austin, Texas Feb 1996 - Feb 2001

Senior Design Engineer

. Wrote product specifications for all products.

. Designed highest density laptop memory (SO-DIMM) used in Dell laptops.

. Performed SI analysis for all products.

. Designed test rack and wrote controlling software for thermal analysis.

. Collaborated with customers to solve problems and determine new product

needs.

. Supported marketing department to develop new proprietary products for

customers.

. Standardized stack product line, resulting in tenfold increase in sales.

Tellabs Operations, Round Rock, Texas Jan 1982 - Jan 1996

Test Engineer (1986-1996), Technician (1982-1986)

. Designed custom automated test hardware and software, some using DSP

techniques, resulting in tenfold increase in test throughput.

. Wrote dozens of manual and automated tests for a wide range of Telecom

products. Wrote low level RS232, digital I/O, GPIB, SCPI, instrument

drivers for DMM, function generators, T1.

. Supervised junior engineers and techs (direct reports).

. Designed HW/SW for high current power supply, DSL, T1, Echo Cancelers,

VF, analog, custom telecom, and many others.

. Did failure analysis, yield improvement, data collection

. Created pareto database, repaired analog op amp and digital products,

corrected design flaw which improved yields from 60% to 90% and saved

>$25,000 in parts.

Education:

BSEE, Computer Block, University of Texas at Austin, Austin, Texas Aug

1986.

PATENTS, PROFESSIONAL HONORS, MEMBERSHIPS:

. 14 patents granted

. Former Member, IEEE JEDEC committees JC45, JC40, JC15, various who's

whos.

Contact this candidate