T.SRAVAN KUMAR
Email : aca67d@r.postjobfree.com
Mobile: 905-***-****
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M.Tech fresher having good knowledge in SAP BASIS Administration.
Objective:
To obtain a challenging position in a company that has an exciting SAP
environment and to strive for superior excellence through continuous effort
and focus on long term goals in professional life. Apply the breadth and
depth of my analytical and technical skills towards company's success.
Personal Skills:
> Ability to work with determination.
> Commitment towards the task assigned and dedication towards the
profession.
> Good communication and interpersonal skills.
> Ability to work in a team environment as well as individually.
Strengths:
> Positive attitude, sense of humor.
> Circumstantial and analytical thinking.
> Ability to adapt and learn new concepts.
Education:
. Master of Technologies in VLSI System Design from JNTU Hyderabad with
aggregate of 66%
(Year of passing 2012)
. Bachelors of Technologies in Electronics & communication from JNTU
Hyderabad with aggregate of 65%
(Year of Passing 2008)
. Board of Intermediate Education AP with 86%
(Year of Passing 2004)
. Secondary School Certificate education AP with aggregate 75%
(Year of Passing 2002)
Technical Skills:
Operating Systems : Windows XP,windows 7, windows
2003&2008 servers.
Hard ware &Networking : MCSE,MCITP
Applications : MS Office, Adobe photoshop.
Products : SAP
BASIS
Installations:
> Installation of SAP R/3 4.7 on Oracle 9i
> Installation of ECC 6.0 on Oracle 10g, SQL 2005.
> Installation of Windows server 2003, 2008.
> Installation of solution manager and configuration.
> Netweaver product installations.
User administration:
> User administration.
> User creation, deletion, lock, unlock, rename, password reset.
> Mass user creation, deletion, rename, lock, unlock.
Client administration:
> Local client copy.
> Client export/import.
> Remote client copy.
> Delete client.
> Detailed understanding of RFC and logical client.
TMS:
> Configuring transport domain / groups.
> Landscape design.
> Performing transport with tp program.
> Configuring TMS between DEV QAS PRD.
> Overview of four and multiple system TMS configuration.
CCMS:
> Health check profiles, operational modes.
> Background jobs standard jobs.
> Audit log configuration.
> Overview of logon- load balancing,
> Overview of workload monitoring and o/s collector.
> Detail study on memory management work load analysis.
Spool Administration:
> Spool administration architecture.
> Local and remote printing.
> Access method and device driver configuration.
> Managing spool requests.
> Working on day to day problem of printers.
Patch management:
> Knowledge of OSS.
> Adding patches and support packs and Enhancement packs.
> Kernel patches.
> Applying Support packs.
> Downloading Support packs.
> Support packs dependencies and requirements.
> Kernel upgrade.
Database Administration:
> Oracle database administration.
> Table space administration via SAPDBA and BRTOOLS.
> Backup and restore Oracle 10g, 9i and MSSQL 2005.
> Database file system.
> Working on SQL queries.
> Oracle system copy.
> MSSQL system copy.
Academic projects:
fpga implemention of sha-224/256 algorithm oriented digital signature
Description : This Standard specifies a secure hash algorithm SHA for
computing a condensed representation of electronic data (message). When a
message of any length < 264 bits is input to an algorithm, the result is an
output called a message digest. The message digest is of 160 bits length.
Secure hash algorithms are typically used with other cryptographic
algorithms, such as digital signature algorithms and keyed- hash message
authentication codes, or in the generation of random numbers (bits). This
standard supersedes FIPS 180- 1, adding three algorithms that are capable
of producing larger message digests. The SHA algorithm specified herein is
the same algorithm that was specified previously in FIPS 180-1, although
some of the notation has been modified to be consistent with the notation
used in the SHA-256, SHA-384, and SHA- 512 algorithms. Tools like Modelsim
is used for RTL design and simulation and Xilinx ISE for synthesis and
implementation on Spartan 3E FPGA's.
Personal details:
Name of Father : T.Yogananda Chary
Languages Known : English,Telugu
Date of Birth : 31-10-1987
Nationality : Indian
Marital Status : Single
Sex : Male