AAYUSHI SHARMA
E-mail: ***************@*****.*** Mobile: 976*******
CAREER OBJECTIVE:
To work efficiently and effectively as well as grow with a prestigious organization so as to achieve self- realization and accomplishment of organizational goals. EDUCATION QUALIFICATION:
Qualification Board/University Year Percentage/CGPA M.Tech
(VLSI Design)
Banasthali Vidyapith 2016-2018 8.19
B.Tech
(Electronics and
Communication)
Uttarakhand Technical
University
2011-2015 70.2%
HSC
CBSE 2010-2011 71.6%
SSC
CBSE 2008-2009 74.4%
TRAINING/PROJECT DETAILS:
Major Project: Solid State Physics Laboratory (SSPL), DRDO, Delhi (2017 July10-2018 April10) Project title: Design of Interface Circuit for MEMS Accelerometer. Minor Project: (2016 July27-2017 May12)
Project title: Implementation of Dynamic Source Routing Algorithm (DSR) using VHDL for Wireless Ad-hoc networks.
Academic Project: (2014 Aug14-2015 May15)
Project title: Bit error rate performance analysis of Orthogonal Frequency Division Multiplexing Transceiver System using M-array Phase Shift Keying (PSK) modulation technique. Professional training:
Training title: MATLAB Technology training from CETPA INFOTECH, Dehradun (2014 June 5- 2014 July16).Simulink toolbox is of great interest to me, as it is easier to design and simulate larger systems with simulink.
Summer Internship: Defence Electronics Applications Laboratory (DEAL), DRDO, Dehradun
(2014 june04 –2014 July15)
Project title: LINUX on Embedded Systems.
SKILL SET:
Scripting and Programing Basic C, Verilog, MATLAB Simulink. EDA Tools Modelsim, Verilog, Soc Encounter (Cadence), Silvaco TCAD. Applications Orcad Capture, Xilinx ISE.
AREA OF INTEREST: Analog/ Digital Circuit Design, Verification, PCB Designing, Communication. ACHIEVEMENTS AND ACTIVITIES:
Delivered a poster on Implementation of Dynamic Source Routing Algorithm (DSR) using VHDL for Wireless Ad-hoc networks in National Seminar on Instrumentation and Characterization Techniques (NSICT 2016).
Presented poster on Implementation of Dynamic Source Routing Algorithm (DSR) using VHDL for Wireless Ad-hoc networks in National Science Day Programme.
Attended World Conference on Advances in Communication and Control Systems.
Scored among top 22% students in 10th National IT Aptitude Test. WORK EXPERIENCE:
Name of
Organization
Designation Date of Joining Date of Leaving Description Solid State Physics
Laboratory
(SSPL), DRDO,
Delhi
Research Trainee 2017 July 10th 2018 April 10th Working with MEMS
Accelerometer