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Technician Engineering

Location:
Manteca, California, United States
Salary:
66,560/yr
Posted:
June 19, 2019

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Resume:

Annette Perez

408-***-****

Hands on trained and qualified senior wafer process and R&D technician. Over 30 years experience in start-ups and established semiconductor companies.

Process Technician Synthesis

Element 6 Technologies

October 2015 to Present

Responsibilities

Set-up, cleaning and operation of 8 CVD reactors

Preparing substrates for CVD deposition

Acid clean of substrates

QC inspections and final metrology measurements

Process Technician III

Solar City

July 2015 to September 2015

Responsibilities

Preparing wafers for incoming inspection via Chroma wafer sort tool

Metrology measurements pre and post 1st etch of silicon wafer substrates for Solar wafer

substrate processing

Note: Began Solar City prior to the beginning of full production at the Fremont location. Primary

duties were assisting in cleaning and set-up of Solar processing equipment

Process Technician

Noel Technologies - Campbell, CA

December 2014 to April 2015

Responsibilities

Operating Stepper aligners, GCA & XLS MODELS

develop inspect, final inspect

operating Axic, Techniques LPCVD, SIO2, PECVD plasma dry etching tools

Using chemicals for wet etching, resist strip of 200 mm wafers

Manual and automated photo resist wafer coating

Operating Ultra dep GSI oxide/nitride deposition tool

Operating various metrology tools film thickness measurements

Wafer Reclaim Technician II

Proactive Business Solutions @ Applied Materials - Sunnyvale, CA

September 2014 to December 2014

Wafer processing to strip wafers of films for customer use on Applied Materials semiconductor

tools

Primary duties are to strip and clean 300mm wafers to bare silicon with both chemicals and dedicated tools

Manufactutring Technician

Kelly Services - Fremont, CA

May 2014 to July 2014

Manufacture of hard disk drive heads in the production dept

Worked in the wet etch dept using automated tools to etch metal from substrates. Position

required continuous use of PC's and microscopes for inspections. Counting, staging, verifying

parts were at the correct location before and after processing to ensure quality processing in a timely and efficient manner.

Wafer Fab Technician

Soraa, Inc - Fremont, CA

February 2011 to March 2013

Engineering and Production sapphire LED wafers and laser substrates through all steps of Photolithography

Worked with negative and positive photo resist through manual and wafer track spin in preparation of exposure

Aligned and exposed Karl Suss Contact Aligner, GCA Stepper and Ultratech Stepper aligners

Developed inspections of all mask levels, disposition of all wafer/laser coming in and out of Photolithography

Disposed of all chemicals in Photolithography: solvents, developers, photo resists, and photo

resist strippers

Trained new hires in all Photo steps

Worked with Engineers to qualify new mask levels for LED wafers and Laser substrates

Engineering Technician/Defect density specialist

Silicon Microstructures Inc - Milpitas, CA

January 2004 to March 2008

Primary goals of this project were to track and chart defect trends in the Production, Engineering and R&D products

Identified root causes and provided effective solutions. This included researching and ordering

tools and any other necessary items or ideas

Implemented and characterized new tools and ideas

Trained and re-trained all wafer fab personnel

Created and implemented new procedures and protocols for effective and positive defect

reduction results

Responsible for all aspects of wafer processing for Engineering and R&D projects

Characterized and developed innovative process methods for new products and transferring

them to production

Qualified semiconductor equipment for production use and analyzing data for optimum

manufacturing output

Conducted troubleshooting and identified process problems in Lithography, Thin Films and Diffusion

Created and implemented documentation for run cards and process specs

Manufacturing Technician

Impax Laboratories - Union City, CA

March 2003 to September 2003

Responsible for processing raw tablets through Coating machine which included:

• Pulling kits from warehouse with pallet jack

Verifying and confirming all paperwork with Quality Control

Verifying all product weights and quantities prior to processing

Setting up and mixing all pharmaceutical powders and liquids into Coating machine

Manually loading and unloading tablets into Coating machines

Counting, weighing and packaging finished products

Reloading pallets and storing products into the warehouse

Disassembling and sterilizing the Coating machine and the entire processing room

Wafer Fab Technician

Oriol Inc - Santa Clara, CA

2000 to February 2003

Responsible for all steps of processing for LED structures, including:

• Ran metallization, operating 2 E-Beam evaporators

Plasma etching of sapphire substrates with epi for LED structures

Managed all steps of Lithography for LED structures

Furnace profiling for anneal and alloy of metalized LED structures

Ordering all chemicals and supplies for clean room

Disposing of all chemicals and waste from the clean room facility

Assisted in creating and implementing production and R&D run sheet for LED structure

processes

Wafer Fab Supervisor

IC Sensors/Silicon Microstructures Inc

1994 to 1999

Managed 8 wafer fab operators, including training and certifications in various aspects of wafer

fab processing

Responsible for writing performance reviews for all operators

Interfaced with all departments to meet and exceed quality and production goals

Wrote and implemented process specs and run cards

Organized meeting weekly/monthly production schedules

Wafer Fab Operator

IC Sensors/Silicon Microstructures Inc - Milpitas, CA

1989 to 1994

Ran wet silicon etching of wafers to specified and varied targets

Conducted Beta scope measurements of targeted wafers and the preventive maintenance of the Beta scope measurement equipment

• Operated and processed wafers through Electrical Chemical Etching (ECE)

Handled all Infrared (IR) aligning and exposing using Quintel aligner

Controlled all levels of align and expose on Canon aligner

Operated Gold, Chrome and Aluminum etching

• Ran Dry etching of Silicon and Nitride on Tegal 701 Plasma Etchers

Assisted in ordering all fab chemicals and supplies

Education

High School Proficiency Certificate in General

Silver Creek HS - San Jose, CA

1976 to 1980



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