Design Engineer Project

SACHIN T KONNUR

Flat A*, VVS Residency, Siddapura Mobile: 974-***-****

Bangalore-560066 Email: **************@*****.***

Objective:

To Pursue a highly rewarding Career in VLSI domain, seeking for a job in challenging and healthy environment where I can utilize my skills and knowledge efficiently for self and organization growth.

Experience Summary:

2.2 Years of experience as a Physical Design Engineer at Quotient Four Technologies Pvt Ltd.

Involved in block level implementation - Floorplanning, Placement, CTS Routing.

Good Knowledge on Timing Fixing in STA.

Knowledge on Physical Design flow from Netlist to GDSII.

Technical skills:

Operating System: Linux, Windows Series

Physical Design : ICC, ICC 2, Innovus.

STA : Prime Time

PV : Calibre(Mentor Graphics)

Languages : Basics of TCL, shell scripting

Project Details:

Project1:

Project

Block level implementation

Technology /Layers

10nm/12 Layers

Tools Used

Innovus, IC Compiler2, Star RC & Prime Time, Calibre.

Macros

40

STD cells

250k

Frequency

576Mhz

Roles and Responsibilities

Floor planning, Placement, CTS, Routing, Timing Analysis & Signoff

Project2:

Project

Block level implementation

Technology /Layers

28nm/9 Metal Layers

Tools Used

Innovus, IC Compiler 2, Star RC, Prime Time, Calibre

STD cells

350k

Frequency

400Mhz

Roles and Responsibilities

Floor planning, Placement, CTS, Routing, Timing Analysis & signoff.

Training Project Details:

Project Name: Block level Design

Macro Count : 12

Technology : 32nm

Gate Count : 82k

Tools Used : ICC, PT

Roles : Block level implementation from floorplan to Routing

Core Competency:

Good understanding of ASIC design flow.

Good understanding of all the Inputs and Outputs of all the stages in Physical Design.

Well Analyzing of Timing Violations and fixing Delay issues.

Fixing of Cell and Pin Congestion issues.

Experience in Placement in with respect to timing closure, Timing Implementation.

Timing fixing in Primetime like DRV issues, Setup and Hold Violations.

Good Knowledge about Block level Physical verification like DRC, LVS .

Basic Knowledge of Linux, C.

Demonstrated ability to work in fast paced team environment

Educational Qualification:

Education

Institute

Year of Passing

Percentage /CGPA

B.E (ECE)

G M Institute of Technology, Davangere

2016

65.45

Diploma

KHKIE Dharwad

2013

66.50

Personal Details:

Father Name : TIPPANNA KONNUR

Mother Name : MALLAMMA KONNUR

Nationality : Indian

Marital Status : Single

DOB : 29/12/1991

Languages known : English, Hindi, Kannada.

Declaration:

I hereby declare that the above mentioned information is correct up to my knowledge and I bear the responsibility for the correctness of the above mentioned particulars.

Place: Bangalore Name: SACHIN T KONNUR

Date:

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