Engineering Technician

Larry S. Patterson

**** ******* ***

Sacramento Calif. 95828

Phone: 916-***-****

Email: ********@*****.***

Summary:

Working in the Telecommunication R&D Division at National Semiconductors Product/Test Group, I’ve worked from product definition and planning through production and release. Interfaced as the central resource with design, process, manufacturing, test, quality, and marketing as the product(s) move to completion and distribution. Worked on complex problems where analysis of situations or data required an in-depth evaluation of various factors. I have a good understanding in selecting methods, techniques, and evaluation criteria for obtaining results.

I communicate well as a team player and share new information, learning’s, and methods with cross functional team members to achieve organizational goals.

Work History:

10/01/2018 - Present - Part Time

Fed Ex

Handler

Sacramento Ca, 95828

05/2016 - currently working part time

Sound Recording Engineer

Turfstone Recording Studio

Sacramento Ca. 95828

- Record Artist, tracking and mixing for professional cd’s

09/28//15 – 04/29/2016

Mixed Signal IP Group - Electrical Validation Tech

Kelly Engineering Resources

3249 Quality Drive, #100 Rancho Cordova, Ca 95670

Electrical Validation Tech: working on Intel’s Mixed Signal IP team Focusing on MIPI products DPHY CPHY MPHY.

Experience with instruments such as O Scopes, programmable voltmeter, current source, power supply, DAQ systems, VNA, TDR, JBERT, logic analyzers and thermal/power, worked with Python and Perl / cmd line scripting to modify the Automation Suite.

Debug failures to circuit board level, assist silicon debug with design engineers for Intel’s Next Generation of SOC.

Good understanding of Analog validation methodologies and electrical validation issues related to analog, digital, mixed-signal circuits and signal integrity.

Experience with test environment and automation working with high speed signal integrity and simulation tools building a “Conformance Test Suite for “D-PHY “ project testing the “Low Power- RX side and High Speed - TX side” for “Voltage, Electrical Characteristic and Timing” modifying Test and Documentation using Windows Office Suite to summarize data as needed.

02 /02/2015 – 06/26/2015

PPA / Pre Si Validation Technician

Cinder Staffing

1365 NW Amberglen Parkway

Beaverton, OR 97006

Area of work for pre-silicon validation:

- Verify through Simic Software tool the functionality of the BKC release boot flows (weekly)

- Create the Contour Test Plan (Jama) test cycle for the current BKC release (weekly)

- Execute each test cycle

- Execute 3D/media Benchmark test using different platforms

- Reporting results using Microsoft office Suite

- Create and update HSD bug

- Ad hoc testing

11/05/2012 – 08/29/2014

MCG System Validation Technician

Kelly Engineering Resources

3249 Quality Drive, #100 Rancho Cordova, Ca 95670

- Firmware Lab Manager Building and maintaining Test Platforms/ Lab inventory

through Tracmor /ISM Shipping & receiving / customer debug support from remote sites on test platforms maintained at the Folsom site.

- Building and configuring Windows* 7 operating system’s

- Monitor and configure debug validation systems

- Set up test platforms and conduct system level tests per documented procedures.

- Responsible for platform upgrades including BIOS, firmware, patches, test content

- Inventory and disposition platform, board, CPU, PCH, and various test cards.

- Through-hole and SMT board rework fine pitch solder, according to documented rework instructions. Can read engineering schematics

- Experience installing ITP / Green Hills / Lauterbach debug software from instructions

- Experience configuring Tek or Agilent LAs and oscilloscopes

09/19/2011 – 07/27/2012

UMG System Validation Technician

Mindlance Inc.

301 E. Bethany Home Road Suite C 189 Phoenix, AZ 85012

- Building and configuring Windows* 7 operating system’s

- Rework boards fine pitch solder work, according to documented rework instructions.

- Monitor and configure validation systems, maintained emulators, ghost hard drives,

- Update system BIOS, run regressions tests, find and file SW tool issues and verify fixes.

- Assist with setup and debug of HW & SW issues, run experiments for debug and test teams,

- Responsible for platform upgrades including BIOS, firmware, patches, test content

- Set up test platforms and conduct system level tests per documented procedures.

- Inventory and disposition platform, board, CPU, PCH, and various test cards.

- Experience installing ITP / Green Hills debug software configuring Tek or Agilent LAs

and oscilloscopes

10/20/2009 – 10/20/2010

System Software Validation Technician

Kelly Engineering Resources

3249 Quality Drive, #100 Rancho Cordova, Ca 95670

- Good understanding of PC system architecture and can debug most PC hardware problems

- Knowledge of programming, scripting, and regression software using Python.

- Experience working with the Gem Automation tool on how to input and retrieve information data

- Experience with Microsoft* SDK's, PC benchmarks, and diagnostic utilities.

- Able to hookup and correctly configure Tek or Agilent LAs and oscilloscopes

- Experience installing ITP software, as well as debug hardware and software problems.

- Responsible for platform upgrades including BIOS, firmware, patches, test content

- Executes instructions from engineers on how to run SV regressions, and report results.

3/26/2008 03/20/2009

CMV Engineering Validation Technician

Kelly Engineering Resources (Contract Intel Corporation)

3249 Quality Drive, #100 Rancho Cordova, Ca 95670

- Responsible for the characterization of CPUs for temperature, voltage and frequency

- Experience using various electronic hand tools and debuggers

- Responsible for conducting engineering tests and detailed experimental testing to collect data.

- Responsible for regular Excel spreadsheet data collection and reports

- Responsible for the installation and deployment of new platforms, thermal equipment, and automation tools

- Responsible for platform upgrades including BIOS, firmware, patches, test content.

- Validating platforms and test content suites

- Responsible for the maintenance of lab infrastructure, thermal equipment and test equipment inventory.

- Responsible for board rework and modifications to validation platforms

06/15/2007 – 09/15/2007

IVC Engineering Validation Technician

Kelly Engineering Resources

3249 Quality Drive, #100 Rancho Cordova, Ca. 95670

- Responsible for collecting data on test floor from ATE

- Characterization of CPUs for temperature, voltage and frequency

- Experience using various electronic hand tools and debuggers

- Responsible for conducting engineering tests and detailed experimental testing to collect data.

- Responsible for regular Excel spreadsheet data collection and reports

- Validating test content suites

- Responsible for the maintenance of lab infrastructure, thermal equipment and test equipment inventory.

07/2005 – 05/2007

Sales Associate Lumber Dept

Forklift Operator - Receiving/Stocking

Home Depot

0651 – FLORIN RD

Sacramento Ca.

02/2000 - 10/2002

Package Handler

Loading and unloading planes - part time

Fed Ex : San Jose Airport

San Jose Ca,

08/14/1984 – 07/5/2004

Engineering Technician IV

National Semiconductor Corporation

2900 Semiconductor Dr. Santa Clara, CA. 95051

- Experience with several design processes CMOS layout and BiCMOS, using the latest cadence tools.

- Responsible for custom layout and verification of Analog products designed on high performance Bipolar, BiCMOS and CMOS process technologies.

Responsibilities include layout schedule estimation, cell layout and verification, top level route and tape out activities.

- 10 years’ experience on Analog layout design on Bipolar, BiCMOS and CMOS techniques with a working knowledge of UNIX.

- Experience with CADENCE Virtuoso, DIVA, Hercules, and Dracula verification tools.

- Duties include process integration, layout design rules, electrical design rules, characterization and reliability testing.

- Responsible for Systems Administration issues involving Cad Migration of Design Databases to New Processes.

- Work with Product/Test Engineers and the new products team to ensure the (Design for Testability) for new products.

- Simulate and evaluate performance of advanced signal processing and coding methods using synthetic and realistic waveforms

- Create and implement test plans to ensure that the new products meet the spec.

- Modify and Developed software (test programs) to work with Automatic Test Equipment (ATE)

- Maintain and perform diagnostics, and system calibration on

Teradyne testers, Catalyst, A575. wafer sort and ATE final test to maintain functionality and accuracy of test performed.

- Experience in test time reduction and yield analysis.

- Develop documentation to describe test procedures and test methods– to be released to production.

- Responsible for Characterization, Yield Evaluation, Failure Analysis and Reliability...

- Worked closely with Analog and Digital Engineers in development of new products involving Circuit Simulation.

- Support Customer Application Issues for Telecom Products.

- Troubleshoot and debug test equipment in demo area as well as production area.

07/1/1978 – 07/15/1984

Electrician Apprentice

Campbell Soup Company Sacramento Calif.

6200 Franklin Blvd Sacramento Ca. 95824

- Responsible for troubleshooting and maintaining Equipment on the production floor.

01/10/1974 – 07/6/1976

U.S. Army Signal Co. Germany

Central Office Telephone Technician

(36H20) Install troubleshoot, repair and maintained equipment in the Central office Exchange.

(36C20) Telephone installation repair and Lineman.

Education:

06/1982 – 07/1984

Westland College

6060 Sunrise Vista, Citrus Heights, Ca.

Electronics Associate Degree Technology

Skills ;

- Strong background in a Production Engineering Environment in the Semiconductor Industry.

- Emphasis on Cad, Reliability, Analysis, Quality Assurance and interfacing with manufacturing.

- Extensive experience working in a team environment.

- Operating Systems: UNIX, MSDOS, Windows XP, Linux and VMS

- Software: Cadence Design Systems, Spice Circuit Simulations, Basic, Pearl, Skill and FrameMaker.

- Hardware: Sun Workstations Unix, PC’s Windows XP, spectrum analyzers, bit error rate counters, TAS line simulators, oscilloscopes, power supplies, volt meters etc.

Certificates of Achievements:

Physical Design & Structure Compiler, Physical Design Verification, Design Framework, Schematic Capture & Simulation, Diva Interactive Verification, Dracula Verification, Verilog XL, and Skill Language Programming, FrameMaker, and LTX Applications Course

Contact this candidate