Hardware Engineer

Suryakanta Mangaraj

+91-845*******

********************@*****.***

Career Objective

• To excel in a challenging assignment in VLSI field; by utilising my skills, education and work experience.

Work Experience

• Electronics Centre of Excellence (ECOE), Bhubaneswar (May 2018 - Ongoing) Characterization of LDO Regulator

Description: VLSI pre and post silicon characterization of LDO Contribution: Wrote Verilog-A models (to validate start-up time, line and load regulation, PSRR) of LDO, test plans and points based on functional specs for post silicon validation of LDO, test start-up time of silicon bring-up LDO using testing tool (digital multi-meter, electronic load, oscilloscope), test the line and load regulation of silicon bring-up LDO using testing tool (digital multi-meter, electronic load), test the PSRR of silicon bring-up LDO using testing tool (function generator, oscilloscope, network analyser), generate test reports and documentation.

Post silicon validation of 24-bit delta-sigma ADC

Description: Testing and post silicon validation of 24-bit delta-sigma ADC Contribution: Analysis of ADC as a black box and theoretically find out the test plans based on functional specs, test the dc accuracy (offset error, gain error, INL) and the ac accuracy (SNR, SINAD, ENOB) of the ADC using EVM software, MATLAB/MS EXCEL and testing tool(function generator, logic analyser), wrote a MATLAB script and with BenchVue software to automate test setup, generate test reports and bug reports by comparing with the datasheet, create a manual calibration unit for debugging. SoC data acquisition system board for smart water quality monitoring Description: Design of a DAQ system board with testability Contribution: Involved in to create the architecture and conceptual level block diagram with DFT technique to make the board testability friendly, create a schematic design using OrCAD schematic capture and TINA Spice and theoretical simulation of the board, define testing points of the board, calculate and define the input and output signal and power budget as per customer specs, responsible for different part used in design and prepared BOM of the design, characterize the silicon bring-up board to validate. Skill Summary

• Testing Tools: Logic Analyzer, Function Generator, Oscilloscope, Multi-meter

• Hardware Languages: VHDL, Verilog, Verilog-A

• Digital Design Tool: Cadence Incisive (NCSim), Cadence Inovus, Cadence Genus

• Backend ASIC Design Tool: Cadence Virtuoso, Cadence Encounter RTL Compiler

• Simulation Tool: PSpice (Spectre), OrCAD Schematic Capture, TINA Spice

• FPGA Synthesis: Xilinx ISE, Vivado

• Scripting: Python, Linux/Unix shell scripting, Tcl/Tk scripting

• Programming Languages: C, C++

• Others: MATLAB, Labview, Keysight BenchVue

Awards and Achievements

• Finalists of the Cadence Design Contest 2018 under UG category for B-tech Project

“Design of Low Power High PSRR LDO Regulator with Smart Power Save Operation”.

• Published a paper titled “Design of two stage classical model Op-Amp for LDO applications” in “8

th

IEEE MINI-COLLOQUIUM” by IEEE ED-NIST Student

Chapter.

• Certified as the VLSI Design Engineer Framework Level-5 by ESSCI (NSDC), India

• Qualified to qualifying round of INDIA INNOVATION CHALLENGE design contest 2016 organized by DST and Texas Instruments Inc.

• Participated in WEBENCH design contest 2016 organized by Texas Instruments Inc. Education

• Bachelor of Technology, April 2018, National Institute of Science and Technology, Berhampur, Odisha.

Electronics and Communication

CGPA: 8.09

Training and Certifications

• Certification course on EDA tools for VLSI/ASIC design at NIST, Berhampur

• Certification course on Cadence VLSI design at NIST, Berhampur Projects and Seminars

• B-tech project on “Design of Low Power and High PSRR LDO Regulator using Cadence Tool”.

• Seminar on “Automated Space Rover using FPGA”.

Personal Details

• Date of Birth:18

th

July, 1997

• Father’s Name: Mr. Godavari Mangaraj

• Permanent Address: Ramabili, Jankia, Khordha, Odisha, 752020

• Languages known: English, Hindi, Odia

• Passport: Available

References

Available on request.

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