Aruna. V
*************@*****.***
Objective To work sincerely and effectively in an organization that offers me a positive atmosphere to learn new technologies. To constantly upgrade my knowledge and skills and come up with innovative ideas in whatever I do.
Bachelor of Engineering
Electronic Communication Engineering
From Karpaga Vinayaka College of Engineering & Technology, Kanchipuram. CGPA : 6.45
Higher Secondary Education
From St.Joseph Higher Secondary School,
Madurai. Percentage :77.83 %
SSLC Education
From Madurai Aruppukottai Nadar Uravinmurai Girls Higher Secondary School, Madurai. Percentage :82.2 %
Professional
Training
Technical Skills
Manual Testing at Qspiders in Chennai
• Software Development Life Cycle (SDLC)
• Software Testing Life Cycle (STLC).
• Retesting and Regression testing.
• Writing Test case and Test Plan.
• Requirement Traceability Matrix.
• Defect Tracking Tool.
Competency
Project
Co-curricular
Activitis
Personal
Details
• Ability to deal with people diplomatically.
• Skilled in analysing and understanding
requirements.
• Coordinating programs and meetings
Title : Design of 64-point mixed radix-2 radix-4 with combined MDC-SDF FFT architecture
Domain : VLSI
Description : To improve the hardware slices, Memories, LUTs and delay consumption of Proposed
Modified BPM based Radix-4 Mixed
SDF- MDC FFT. In the proposed work,
advantages of both SDF and MDC architectures
are realized and combined both these
architectures for improving the performances of
SDF- MDC FFT.
Participated in paper presentation on WIRELESS
MOBILE CHARGING held on 6 th AUG,16 at IFET
College of Engineering& Technology.
• Father name :Velayutham A
• Date of Birth :25-11-1996
• Gender : Female
• Nationality :Indian
• Language known :English,Tamil
• Permanent address:17B/24 Ramasamy naidu
street South veli street,
Madurai-625001
• Hobbies :Cooking, Playing throwball
Declaration I hereby, declare that all the above information given are true to the best of my knowledge.
Place: Chennai
(Aruna V)