VENNETI RAMADEVI

Female, **-**-****,

ac93vw@r.postjobfree.com

ac93vw@r.postjobfree.com,

+916*********

OBJECTIVE

To work in a company with a professional work driven environment where I can utilize and apply my knowledge, skills which would enable me as a fresh graduate to grow while fulfilling organizational goals.

EDUCATION

Degree/Examination

Institute/University

Year

CGPA / %

Class

B-Tech(ECE)

Grandhi varalakshimi venkatrao Institute of Technology, Bhimavaram.

2016-2019

78

Distinction

Diploma

Smt.B.Seetha Polytechnic College,

Bhimavaram.

2013-2016

90

Distinction

SSC

PSM Girls High School,Bhimavaram.

2012-2013

9.0

Distinction

TECHNICAL SKILLS

IOT Knowledge

Matlab programming

C Programming

Verilog programming

Digital VLSI design

PROJECT DETAILS

TRAINING PROJECT:

Tools : Innovus, Calibre

Technology : 28 nm

Specifications : 11 Metal Layers, 320 MHz Frequency,300k cell count,29 Macros

Responsibility : Owned blocks for floor planning and cleaning DRC.

2)Project name: Snake game using FPGA board

Software : Xilinx vivado using verilog HDL.

Team Size : 3 members

Role : Front end designer.

Organization : GVIT

Project Supervisor (s): Mr.Aravind Kumar (Assistant Professor Dept. of ECE)

Area/Domain of Research: VLSI

Description: Designing simple games are initial steps for the design of high speed complex games . Driving VGA

monitor, interfacing keyboard, generating different sounds are key steps for the design of any game. In this

project we designed SNAKE game.

3) Project name :Interfacing monitor with FPGA

Software :Xilinx vivado

Team Size : 3 members

Role : Front end designer

Organization : GVIT

Project Supervisor (s) : Mr.Aravind Kumar (Assistant Professor Dept. of ECE)

Area/Domain of Research: VLSI

Description: Images displayed on VGA monitor using NEXYS 4 DDR FPGA board. As Xilinx vivado tool

doesn’t have any feature to store the image directly, we are converting image to .coe file using MATLAB. Xilinx

is used to store the coefficient file(.coe) in Block RAM by defining width and depth of the image . Block memory

generator provides single port and dual port block memory and runs upto 450 MHz. By using VGA controller

image is displayed on monitor.

4)Project name: Automated Dental Image Analysis by Deep Learning on Small Dataset Using Digital

Image Processing

Tool used : Matlab Software

Here, we have developed a automated, streamlined dental image analysis approach that integrates dental image diagnosis knowledge. It supports the automated apical region identification which saves much manual effort.Our study will be helpful to medical image analysis problem.

KNOWLEDGE AND EXPERIENCE

Knowledgeable in Proteus tool, Matlab.

Experienced in Designing of code Verilog HDL .

Experience in Calibre Tool –Physical Verification.

Good understanding of Physical Design flow.

Knowledge on PNR Flow: Floor planning,

knowledge on SOC and IP.

AREAS OF INTEREST

Digital Electronics

Digital VLSI design

Embedded systems design

Software Developer

PARTICIPATION AND PRESENTATIONS IN TECHNICAL EVENTS &TRAINING PROGAMS

I have participated "Circuit-X, Circuit Debugging" in Technical Fest

I have attended the workshop on Internet of things undertaken by smart bridge company.

I have given a ppt on RFID Technology at SRKR College of Engineering.

I have given a ppt on IOT concept at JNTU K University.

EXTRA & CO-CIRRICULAR ACTIVITIES

Won 1st prize in Talent test.

Won 3rd prize in "Circuit-X, Circuit Debugging" in Technical Fest.

Name : Venneti Rama Devi

Fathers Name : V. satyanarayana

Date Of Birth : 25-12-1997

Gender : Female

Nationality : Indian

Languages Known : English, Telugu

DECLERATION:

I hereby declare that the information given above is true to the best of my earnest endeavour to discharge competently and carefully the duties you may be pleased to entrust with me.

Date:

Place: Venneti Ramadevi

PERSONAL DETAILS

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