DUBASI DURGA KALYAN
Mobile: 984-***-**** Email: ************@*****.***
OBJECTIVE
To seek challenging assignment and responsibility, with an opportunity for growth and career advancement as successful achievements.
PROFESSIONAL EXPERIENCE
Working as a VHDL code Developer for FPGA, Flight Data Analysis code developer in MatLab Software and RF Test Engineer in “Project ASTRA”, RESEARCH CENTER IMARAT (DRDO) from Nov 2016 to Present.
Role and Responsibilities:
1.Developing the HDL code for UART in FPGA Spartan 3E board and for ASTRA RPF units.
2.RPF data analysis has been done in MatLab software that is coming from Telemetry unit.
3.Testing the RPF units with RF Cables in closed loop model with the help of Target Simulator in Bench level checks for Primary Level testing.
4.Radiation mode checks of ASTRA RPF unit in Anechoic Chamber for open radiation mode.
5.Integrating the RPF unit into Missile sections with Low Noise Amplifiers and Ku-Band Antennas.
6.Missile level checks, Phase checks I, II, III and IV of ASTRA Missile in Project Checkout system.
7.Real time experience of testing and launching ASTRA Missile from Su-30 Fight Air Craft Launcher in Air Force Station, Kalaikunda, Kharagpur.
8.Hardware In-Loop Simulation system testing of On Board Computer, Telemetry System, Seeker model with RPF unit communication analysis.
9.Working on Function generator and Delay line simulator (Mixer setup) for secondary testing of RPF unit.
10.Testing of RF cables VSWR and Different types of Loss by using Network Analyzer.
11.Checking the working of RF cables with the help of Signal Generator and Spectrum Analyzer.
12.Working on Power meter for measuring the power that is coming from RPF unit Transmitter.
13.Working on Digital Oscilloscope for testing of OBC and RPF internal communication for OBC and RPF sync update timing analysis.
14. Working with Analog oscilloscope for testing of RPF unit Analog channel references taken in HILS simulation.
15.RPF unit Flight data analysis Documents and Presentations has been done and submitted to higher authorities.
ACADEMIC QUALIFICATION SUMMARY
Bachelor of Technology in Electronics and Communication with 59.09 % from JNTU KAKINADA.
Diploma in Electronics and Communications with 78.74% from SBTET Andhra Pradesh.
SSC from Sri Kakatiya High School with 78.85% Vijayawada.
TECHNICAL QUALIFICATIONS
Operating Systems known : Windows XP, 7 and 10.
Application Software : MS Office.
Packages : Xilinx 14.7, MatLab 2015a & 2017a.
Programming Languages : VHDL & MatLab.
ACADEMIC PROJECT
Final Year Project: “UNDER GROUND CABLE FAULT DETECTION USING ARDUINO”
We designed this project for cable fault detections useful for telecommunication in an organization. We designed specifically for our college.
Duration: 6 Months
Mini Project: “EMBEDDED WITH ARDUINO” using Arduino UNO DSP board.
It is a Two Day National Event to develop the Embedded C code for LED blinking and Counter/ Timers on Arduino board in “AMRITHA SAI INSTITUTE OF TECHNOLOGY, Paritala”.
COURSES
Done VLSI Hardware design course and training in Fronyn Technologies, Hyderabad.
INTERNSHIP
Done Internship in “VISAKHAPATNAM STEEL PLANT” for Two weeks in June 2015.
ACHIEVEMENTS
ACADEMIC : 1) Done “Industrial Training” on “DATA ANALYSIS”
In “EFFTRONICS SYSTEMS PVT.LTD” from January to
February 2016.
2) Participated in skill development program of “APSSDC” for two weeks in “DVR&D.HS MIC COLLEGE OF TECHNOLOGY” (2015).
3) Attended a “DST Sponsored Two Day National Seminar” on SMART ANTENNA TECHNOLOGIES” in “DVR & D.HS MIC COLLEGE OF TECHNOLOGY” during 21&22 of August 2015.
EXTRA-CURRICULAR : 1) Playing Badminton.
2) Caroms.
PERSONAL PROFILE
Date of birth : 12- March-1994
Gender : Male
Marital status : Unmarried
Father’s name : D. Adinarayana
Languages speak : English, Hindi & Telugu
Permanent address : D.No 23-22-11, Hanuman Street, Satyanarayanapuram,
Vijayawada-520011.
DECLARATION
I hereby declare that above furnished particulars are true to the best of my knowledge and belief.
D.DURGA KALYAN Place: Hyderabad
Date: