Wenming Feng

** ******** **., ******** ****, ON, L4C9X5 ● 647-***-**** ● ac8bk2@r.postjobfree.com

SENIOR SYSTEM ENGINEER

** **** *****’ in C/C++ software development for telecommunication solutions such as: VOIP home gateway embedded equipment, router/switch embedded systems, IMS (IP multimedia System) systems and mobile platforms in Linux environment, WIFI,bluetooth solutions on freescale, ARM, …interrupt, UART and DMA engine, low level device drivers development, home gateway solutions' boards bring up and debugging, HW issues debugging with HW engineers, accelerating the shipping chip to market.

4 plus years in IMS telecommunication equipment and system design and development, optimizing system architecture, SQL,MongoDB,Rest,NodeJS etc.

5 plus years+ experience on Qualcomm WIFI,bluetooth, IOE/IOT solutions architecture design, development, system integration, design from chipset to product, porting bsp from linux to arm and other third party platforms. Supporting and fix issues from customers.

Improved customer satisfaction, and gain key customers in APAC.

AREAS OF TECHNICAL EXPERTISE

Experienced/expertise:

C/C++

Bash Shell

MGW/MGC(Media Gateway,Media Gateway control) Multi meida

linux kernel/device drivers/firmware/alsa

I.MX6 QUAD core/dual core MQX serial of cpus

QCA wifi chipset/router/home gateway paltforms,Freescale I.mx5/i.mx6 application processors,HDMI/uart/Ethernet/GPU/IPU.

Android architecture and application

General:

TCL/Perl

Python, SQL,NodeJs,MongoDB

GNU GCC tool chain for arm and mips

Java/JavaScript

python

perl

embedded system design

WIFI/bluetooth/wireless /BLE

VOIP/VoLTE

TCP/IP/UDP/RTP/RTCP

audio/I2s/ codec/DSP

SPI/PCM/I2C/I2S/UART/GPIO

IMS/SIP/H248/SS7/call control

Modern OS,Linux,QNX,FreeTOS,ThreadX

alljoyn/allplay (both on android and IOS)

linux alsa for audio

IOE/IOT/m2m/

Ethernet/switch

CVS/Clearcase,perforce/build/release

SCRUM,agile,git

Tech-knowledge of SSD/SAS/SATA/PCIE

CPU arch such as arm/mips/ppc

openGL,openCV,CUDA,Graphics driver Multimedia.

PROFESSIONAL EXPERIENCE

Senior Firmware engineer ATI technologies ULC 1 Commerce Valley East.

January 2018 ~ present

GPU mulitimedia IPs Diagnostics familar and UVD(universe vedio decoding Diagnostic training).

Multimedia codec specifications such as HEVE(h265)AVEC(h264),legacy codecs such as MJPEG-2/4 VC1,VP9 training. AMD GPU IP vega10,emulation,Navi 10 and diagnostics test enviroment falimar and Multimedia Diagnostic framework study and Diagnostic tools learning.

uvd code warning clean, uvd code optimization and static code check with cppcheck, clang compiler warning cleaning.

AMD diagnostic framework code structure and architecture learning, the C++ factory mode, xml config and test cases add into diagnostic frame work methods.

Senior linux embedded system engineer

Istuary Eye Inc.,75 Tiverton Markham,ON, May 2017~ Nov 2017

Linux Root file system porting,customizing,Nvida tk1 firmware developing, pcie host inband driver design and developing for communication with Kc705 xilinxFPGA board. Linux system level requirement for video pipelines and deep learning architecture design.Framebuf,GPU graphics driver OPENCV,openGL, CUDA,caffee and googlenet model AI/Machine learning algorith verification for face identification algorithm verification on xilinux fpga.

Using Googlenet model as Neural network processing to verification deep learning for face detection. Implement verification on xilinux Kc705 FPGA. With prepared training serial sample data for 1000 photos, the deep learing model verifications from simulation got 97% similar result as the reference board.

Senior Firmware engineer

Mircom group of companies, Vaughan, ON, August 2016 ~ May 2017

Linux kernel,firmware design,development, based on Freescale I.MX5, I.MX6 serial application processors.

Fire alarm,security monitor and smart building solutions system architecture design, modules,mcus selection and verification. Various Systems integrate and performance optimization. Tasks including arm cotex-a8,cortex-a9 imx51,imx53,imx6qdl serials application processes and HW bring up, BSP and firmware customization. JLINK JTAG board level debugging, bootloader develop and customization, linux kernel, device drivers design and develop. embedded APU,GPU driver bring up,openGL.

Highlight:In Four months bring up metal board based on Freescale i.mx6 dual core cpu,apu gpu, customized the network,audio,video sensor and other peripheral devices and firmware.

Embedded technical specialist

Thales Canada transport group, North York, Toronto January 2016~ July, 2016

Key Achievements:

Performance measure SDR (software defined Radio) system. Fabric ring network analysis such as ring throughput performance at different packet size, Data path capacity measure and improvement, WIFi FHSS throughput system analysis such as packet loss and its influence on IPsec tunnel establishment, packet loss and its influence on roaming and robust of ATS system. Bootloader, FPGA, device driver bug-fix new feature developing and system testing and stability analysis, DCS system testing and performance optimization. Improved stability of SDR system and enhanced customer satisfaction.

Integrated open source net-SNMP into SDR target, enabled the SDR/SD to report OAM and events to ATS control centre. Extended snmp-agent SDR/SD. Enabled supporting new mibs. Improved security and controllability of the wireless Devices in the ATS train control systems.

Many test tools design and developing using shell to measure the test results and generate readable reports. Improved stability and quality of the SDR/SD wireless signal sub systems.

Technical Difficulties fixed: SDR has snmp function but not working and MIBs not extensible, I enable the debugging and trace into snmp agent. Find the root cause, make function and MIB extension both working in two-weeks.

Senior Firmware Engineer (Linux Designer)

Qualcomm, Shanghai, China, Mar 2010-Sep 2015

Key Achievements:

Project #1 Alljoyn and allplay Qualcomm smart audio module for factory mass and test guidance.

Accomplished alljoyn and allplay Qualcomm smart audio module Factory Mass production diagnose guidance. Design reference fixture for product line testing. Design audio module GPIO, I2S, Ethernet, USB, SPI, UART,LED, interfaces verification spec, diagnose method and diagnose tools. Chipset Module and mainboard Image upgrade and automatically bring up. Do WIFI throughput, calibration and KPI, verification setup guidance and diagnose methods design.

Technical Difficulties Solved: For mass production in factory, verification need to perform automatically with less manually input, I find a way and design the diagnose equipment and all scripts, programs with only one command in 3 weeks.

Improved key customer satisfaction and relationship with ODM/OEMs such as Panasonic,Samsung etc.

Project #2: Project Manager: VOIP turnkey solution, design VOIP solution architecture,HAL(hardware Adapter Layer,Call control PJmedia APIs. Coding (SPI/PCM/SLIC linux driver in c), call control engine in C++ (10,000 lines+). Unit test, System performance enhance, PCM/SPI/SLIC device drivers developing.

Highlights: For VOIP there is real time requirement, the one way delay is as short as possible, data path from old solution moving data from kernel space to user space or verse vice. The other is fast path and slow path are tightly coupling. I design the architecture to moving data only in kernel space and separate the data path from control path. The one-way delay less than 50ms.

Design an HAL(hardware adapter layer) between SPI/PCM bus and slic interface to encapsulate the implementation of SPI driver and slic(DSP) driver from application. Enhanced code Reusability and portability of VOIP solutions.

Our team shipped a robust and scalable VOIP turnkey solution to market in one year.

Project #3: FPGA/ASIC verification of PCM/SPI bus, audio I2S/I2C/SPDIF bus. Alsa Device drivers design and development, I2S DMA engine and interrupt tuning on QCA home gateway solutions. From Design, coding(C code 1000 lines) testing, porting and performance tuning to reference boards bring up. Use oscilloscope and logic analyzers to debug the HW interfaces and FPGA/ASIC verification.

Technical Difficulties: For verify a new audio IP core and new interface on FPGA, there are bugs in FPGA or in HW circuit, need to find a way to show where it is. I do verification in steps: first step test one directory by using a fixed data in CPU memory. Using logic analyser capture the writing data on i2s to see correctly data from CPU to DMA and the time serial and clocks are correctly there we can find fpga code issue. Second step, not introduce interrupt just polling from i2s bus to cpu DMA, after it is okay. step 3 using interrupt drive the data path.

Accelerated the home gateway chipset layout and solutions ship to market.

Project #4: Daily and nightly build, release tools design and develop with shell, perl and/or python. 1500 lines of scripts

Improved the automatically daily build and nightly build time.

Senior system engineer (IMS/VOIP solution)

Mavenir systems (Mitel acquired), Shanghai, China, 2006-2010

Key achievements:

Project #1:IMS-SGW Media Resource Management subsystem design and develop.

Accomplished design, C++ coding (10,000lines+),Unit test, Integrating, application performance analysis and optimization.

Achieved as the robust subsystem in the company's first VOIP solution.

Project #2:IMS-MGCF/SGW Media Gateway and Media Gateway controller subsystem.

Design, coding C++ (5000 lines),Unit testing, application performance optimization.

Highlights: Introduce the resource usage dynamic table in memory to accelerate the allocation and release of media DSP channels, improved the call procedure time by 1 second.

Accomplished the project in two months and speed up the solution to customer.

Project #3: IMS-MGCF/SGW simulator, Signal Simulate Media Gateway design and develop.

Using c++, integrate trillium protocol stack libs and memory usage optimization.(Design, coding, unit testing, performance and memory optimization).

Highlights: improve the system CTS call and terminal call per seconds from 300CTS to 500CTS.

Improved the test efficiency and test automation.

Project #4: SS7 subsystem integrate and performance tuning.

Integrate trillium SS7 series stack for call control into IMS solutions. Memory leakage debug and system CPU usage optimization, multithreads and throughput improvement. IPC enhance and fix deadlock key issues. Architecture re-organ, Unit test, performance analysis and improvement.

Highlights: SS7 is the key module and there are several key issues, high memory and cpu usage, easy to crash and lower performance. By using valgrind and gprofile, I fixed the cpu and memory issues, fork the threads right after the parent is created not all init of the stack to lower memory usage. And find out root cause of crash is in RPC between multi threads because of race condition. Use serial mechanic through using queue between threads to avoid race condition.

Fix some key issues, memory leakage and thread deadlock, advanced the robust of the system.

Project #5: App services manage Message transfer Middleware design and develop.

Design,coding C++ 5000 lines, integration and performance optimization.

Set up a bridge for platform c++ message to OAM java message.

Platform software engineer

Spreadtrum communication, Shanghai, China 2003-2006

Key achievements:

Project #1: Input method design, develop, integration third-party input method into SpreadTrum solutions. Porting input method and optimization performance. Design MMI input core structures and architecture, coding(C 4000 lines of MMI key modules), unit testing porting and integrate third-party software.

Highlights:In one month time developed a Spanish input method for South America customers and Win the company for a $70000 allowance from the customer.

Project #2: Team leader: GUI (General graphics interface)/MMI (Man machine interface) design.

Define main data structure. Designed,Coding in C 4000 lines, Tutor fresh team member.

Globalized the languages and input on Spreadtrum mobile solutions.

Project #3: Dphone lock phone and sim-card each other.

Design the procedures, coding the feature(C 3000 lines), unit test, integration, GUI debug and performance optimization.

Highlights: Designed a static algorithm for accelerate the matrix char display on screen and reduced the code size of whole MMI package. Optimized the matrix GBK char display algorithm from pixel to 8 pixels/10pixels/12pixels/14pixels and compressed the nxn matrix chars in c buffer. Display charsets scanning speed improved 3 times.

In one year's time (Finance year 2004) help Spreadtrum gaining 70% marketing in module area and win 20 Millions' revenue.

Project #4: design and develop many apps and develop platform solutions for mobile phones.

Reference Design, solutions develop (C code 3000, Unit testing. Those apps are widely used in 2.5G GSM mobile solutions).

Add more feature's for Spreadtrum cellar phone solutions.

1997/07 ~2000/08 Company name: Baling Co,Ltd. Employment technique Institute

Position: Technique Teacher

MAIN Achievements:

Computer application technique course design, develop and lecture.

Trained 300 employees yearly, who occupied the key positions in the product process lines of the company. Improve the operation technique of the computer controlled DCS (Distribute control system) product lines. Improved direct economy benefits by 20 percent.

EDUCATON

Master’s Degree, Mechanical Design and Theory

Zhejiang University, Hangzhou, China, 2003

Bachelor’s Degree, Dynamc Engineer Automation

Zhejiang University, Hangzhou, China, 1997

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