Mark Hennecken

Lakewood Washington 720-***-**** ac7zxg@r.postjobfree.com www.linkedin.com/in/markhennecken Engineering Development Leader

Established reputation as the go-to resource for resolving the most demanding technical, project leadership, product development and business challenges. Achieved consistent success by tying together people, processes and technology to drive ongoing engineering and business improvement. Consistently achieved aggressive business goals, strengthened product design efficiency and made engineering processes more agile. Routinely led successful teams in devising creative solutions based on new approaches and better applications of technologies. An engineering leader with excellent people skills. Worked with vendors and customers in Austria, Japan, Singapore, Switzerland, among others. Earned Oracle’s Bronze, Silver and Gold Achievement Awards. Streamlined business processes, and enabled those processes to strengthen the bottom line. Produced outcomes consistently beyond planned goals for competitive, technology-intensive enterprise. BSEE from Manhattan College. MBA coursework in Business / Finance at the University of Colorado. Completed Design for Six Sigma (DFSS) Black Belt training. Project Management Certification Program at the University of Colorado Fortran Pspice OrCAD Matalb Mathcad Project Office Analog Digital UVM Strategy Marketing Design Verification FPGA ASIC Quartus Altera Xilinx Roadmap Presentation budget schedule product management project management software hardware Cadence Mentor Graphics Minitab, System Verilog Power RF Leadership Leader Change Innovator, business communication coaching collaborative firmware Synopsis Key Achievements

Fast tracked resolution of an unexpected problem, saving a multimillion-dollar order. Customer who had been using beta units without problems contacted Oracle stating that they were getting failures with production units. Set up problem solving group with customer, 3rd party vendor and internal team. Identified problem, developed software fix while work began on a permanent solution. Issue was resolved within three weeks, saving a $2.5M order. Turned failing department into major contributor to nine figure revenue stream. Oracle’s digital group had been unable to produce a product that did not require ongoing time and money to fix problems for more than 15 years. Drafted and implemented turnaround plan. Next project was completed on time with ASICs working perfectly right out of the gate. Saved $5M+ and nine months of development, helping to generate over $900M in revenue. Eliminated unnecessary costs through innovative thinking and design. Internal development of a microprocessor offered significant cost advantages over use of licensed technology. Using this internal design eliminated nine months of legal negotiations, a one-time fee of $500K and a royalty of $5 per device. Created integrated, multi-disciplinary process that supported successful product launches. Development of new products involved electronics, software and mechanical components, combined with test, qualification, and manufacturing. Leading these cross-functional teams, allowed each department to provide feedback to other groups so that priorities and resources were properly assigned. This produced the successful release of five products, resulting in over $1.5B in revenue. Moved previously inferior product performance past the competition. Oracle’s performance for small data blocks was consistently worse than the competition. By encouraging his team to think outside the box, an idea was cultivated resulting in the design of our own microprocessor using open source technology. It was designed and implemented, and performance beat the competition by 10%.

Constructed budget and schedule critical to a successful, 1st to market product launch. Planning for the next product release, required schedules, technology, and budgets (NRE, Capital, and Expensed) to be in place to start planning for development, vendor identification, test and manufacturing. Contacted vendors to secure quotes, Budget was 100% on target, and schedule was met with high degree of accuracy, and product was 1st to market. Instituted technology development process enabling new products to leapfrog competitor. Set up environment in which engineers worked on inventing new technologies in advance of immediate need. Reduced inherent uncertainty in scheduling invention simultaneously with product development by almost 100%. Having the technology ready produced 1st to market status for Oracle (and industry’s) first 1, 5 and 8TB data storage products. Slashed development costs through strategic partnering. Led development partnership with another company based on common specifications for ASICs useable by both companies. Development expense was split, with the added advantage of Oracle using the higher volumes to get better pricing. Reduced component cost by more than 50%, saving Oracle over $1M in development costs. The resulting products have produced over $1.5B in revenue. Consulting for startups 2017 - present

• Analog design including:

o Linear and buck converter power supplies improving efficiencies 40% points o Audio processing, custom filters, off-the-shelf and custom amplifiers o LiDAR detection systems using photo-diode and APD detectors

• Budgets, schedule, and vendor selection

• PSpice, Orcad, LTspice

Director ASIC Development, Velodyne LiDAR 2016

• Built team for ASIC (application-specific integrated circuit) development with this startup provider of autonomous navigation products for automotive and UAV industries

• Designed high speed, high current Laser Driver. Responsible for low noise Transimpedance Amplifier design. Advisory Analog Engineer & Senior Engineering Manager, Oracle, Product Development 2000 – 2016

• Promoted twice, starting as an advisory engineer, promoted to manager, then to senior manager.

• Up to 24 direct reports, 100+ indirect reports

• Over $2B generated through success of all projects.

• Managed $20M budget and 24 direct reports. Hired personnel and strengthened performance improving reliability, agility, and delivery.

• Maintained productive relations with production partners in Europe and Asia. Worked with Marketing, Sales, Legal, and Operations on selecting vendors, completing contracts, and SOWs, for initial development through end of life

(EOL) planning. Participated in product feature and function definition.

• Directed all analog, digital, FPGA, ASIC, and most development including power, PCBA, and software.

• Led system level teams, including hardware, software, manufacturing, EVT/DVT, FCC, and test groups.

• Conducted marketing research, managed regulatory issues, and planned engineering strategies and road maps.

• Met with and presented to executive staff and customers such as CERN, Microsoft, and Oakridge National Labs, budgets, schedules, strategies and roadmaps.

• Implemented Six Sigma tools such as VOC (Voice Of the Customer) Pugh Charts, DFMEAs and DOEs.

• Designs included

Phase Lock Loops

Active and passive filters

100MHz wide band Low Noise Amps, current sources, Viterbi Trellis, AGC

8 and 10 bit Analog to Digital Convertor support circuits

Changed fundamental architecture of wideband sensor interface improving feedthrough isolation over 60dB

Linear and switch-mode power supplies. 48/24V DC input, 5V, 3V, 1.8V outputs

Worked with external vendors designing new 48V power supplies increasing efficiency 35 percentage points o Wrote software written in MatLab, MathCad, Fortran and C. o Worked with PCB layout group placing components are routing critical traces. Modified IBIS models to optimize signal integrity.

o 11 Patents

• Tools include Microsoft Project & Office, Orcad, PSpice, TIA, Spectrum & Network analyzers, O’scopes Advisory Engineer, Ecrix Corporation, Product Development 1998 – 2000

• Recruited by Vice President of Engineering to design analog and digital electronics for this startup specializing in state-of-the-art data storage tape drives.

• Worked with production partners in Asia.

• Designs required signal transfer between stationary and rotating assemblies. o This included characterizing transfer function across inductive coupling to determine equivalent LCR circuit. o High speed amplifiers, filters, Analog to Digital Conversion o Multiple PCB layouts

o Custom communication and control protocol and design o DC/AC power conversion

o Digital design in Altera CPLDs

o 1 Patent

o Tools include Orcad, PSpice, Quartus, Network Analyzer, Function Generators, Network analyzers, O’scopes Senior Manager, Integral Peripherals, Inc., Test Engineering 1996 - 1998

• Promoted from advisory engineer to Manager, then Senior Manager

• Responsibility included electrical, mechanical, software, materials management and manufacturing.

• Simplified hardware architecture, saving six months and $400K in development. Achieved 25%+ cost reduction by cutting excess inventory and open work orders 50% in three months.

• Took over printed circuit board assembly (PCBA) producing 300% increase in production with half the staff.

• Played key role in implementing ISO 9000. Controlled $5M budget and led team of 19.

• Designed hardware including

o Designed PID Servo system for velocity-controlled actuator (Dynamic Load/Unload) o PLL based Spin motor control

o 150 MHz low noise read channel for DAT with up to 50dB of gain o Peak detector with 120 MHz bandwidth

o STW Read/Write channel and Pogo Interface boards including high bandwidth receivers, PECL drivers, and Xilinx FPGA digital design.

o Phase Lock Loop (PLL)/clock synthesizer

o Custom filters

o High Current/Power drivers using composite amplifiers and bridge circuits. o Software written in MathCad, Visual Basic, C, and Fortran.

• Tools Microsoft Office, Project, PSpice, Orcad, Xilinx, Spectrum Analyzer, Network Analyzer, O’scope Staff Engineer, Manager, Maxtor Corporation 1992 - 1996

• Promoted from staff engineer to Manager

• Managed an organization of 35 electrical, mechanical, software, materials, manufacturing, and documentation personnel in the development and build of disk drive test equipment.

• Achieved, for the first time, that first copies of all Test Equipment were delivered ahead of schedule.

• Demonstrated improvement in morale and productivity by the on-time completion of over 12 pieces of equipment.

• Performed staffing, budgets, manpower, and program schedules for following year.

• Awarded large stock option bonus for successful turnaround in organization.

• Initiated development of 3 new projects to replace obsolete equipment. Standardized hardware and software, resulting in shorter development times, easier maintenance, and simpler documentation. o Designed new Universal Interface including R/W channel, analog & digital control for Universal STW. o Designed a 20MHz bandwidth In-phase/Quadrature phase demodulator for use in media flaw mapping. o AGC circuits, DACs, Threshold Detectors

o Design experience also includes R/W channels, custom filters, high speed low noise amplifiers, analog & digital design using PECL/TTL/CMOS technology.

o 1 Patent

• Tools Microsoft Office, Project, PSpice, Spectrum Analyzer, Network Analyzer, O’scope, Frequency Synthesizer Cray Computer Corporation Analog Design Lead 1990 - 1992

• Supervised 6 engineers and technicians developing a new power system for the Cray 3 computer.

• Designed a state of the art, 500 KW DC/DC power system at 40 watts/cubic inch and 85% efficiency at 3.5 volts. System capable of 750 KW, at 60 watts/cubic inch.

o 250V DC input, outputs of: 5.1V, 1.2V, & 3.5V at 525A typical output current o Current mode control, with slope compensation

o Push-Pull configuration, with custom toroid transformers, cut C-core chokes Martin Marietta, Senior RF Design Engineer 1987 - 1990

• Subcontract manager for a $500K millimeter wave multiple beam antenna array.

• Designed an attitude and positioning subsystem of a 60 GHz communication link. The design used surface acoustic wave devices (SAW) and spread spectrum technology.

• Analyzed existing GaAs electronic TIA for the LaserCom program, to verify gain, frequency response, and noise performance using PSpice. Developed the models down to the detail of the bonding wires in the hybrid circuit. Simulated gain from 100 KHz to 350 MHz came within 1 dB of actual circuit. Noise was calculated within 2 pA of actual value.

• Designed 100 KHz to 1 GHz transimpedance amplifier, including strip-line layout to replace the 350 MHz amplifier

• Circuit board layout for microwave electronics

• Wrote FORTRAN program to perform 3 dimensional FFTs and 3-D graphics for the analysis of speckle induced by various fiber optic cables.

US Air Force 1982 - 1987

Senior Electronic Intelligence Operations (ELINT) Officer Rank of Captain Air Force Commendation Medal Top Secret/SCI/SAR Clearances

• Managed 15 engineers and technicians during SAR (Special Access Required) programs for EW projects

• Performed analysis, and dissemination of electronic intelligence collected by RC-135 aircraft of enemy RADAR o Analyzed antenna radiation patterns including ERP, beamwidth, sidelobes, inter and intrapulse modulation

• Performed hardware and software system development on 9 microwave collection & processing systems. o Corrected deficiencies in interfaces between systems, operating guidelines, and implemented new processing systems. Wrote processing software

• Author and Editor for the SAC Intelligence Quarterly Career Position Highlights

• Earned 13 patents

• ROTC Scholarship, Captain USAF, AF Commendation Medal

• Wide background of Analog design with digital and software design.

• Managed and directed wide variety of product development functions including electronic, mechanical, software, test, PCB, power, manufacture, vendors, legal, EMI/EMC compatibility and more

• DFSS black belt training and implementation

• Co-Founder / Engineering Director for Hardware Development for Startup

Designed hand held microprocessor-based tablet including LCD, touch screen input, and power management. Education

BSEE, Electrical Engineering, Manhattan College, Riverdale, NY UASF ROTC Scholarship

MBA Coursework in Business/Finance, University of Colorado, Denver, CO Professional Development

Design for Six Sigma (DFSS), Black belt training

VOC Pugh Charts, DOEs, DFMEAs

Project Management Certification Program, University of Colorado, Denver, CO Fortran, C, Android, Python

Volunteering

Ability Connection Colorado – Education programs for kids with disabilities FIRST – Mentor robotics design

High School Science Project Mentor

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