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FPGA/Hardware Engineer

Location:
La Ciotat, Bouches-du-Rhone, France
Posted:
December 05, 2018

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Resume:

Guillaume JOBARD

Electronic Engineer

ac7vp3@r.postjobfree.com

+336********

** *** ****** ********, ********, France

Junior engineer freshly graduated from INP-ENSEEIHT, eager to find a company that will stimulate his craving desire of knowledge WORK EXPERIENCE

06/2017 – 09/2017

Research Assistant Internship

University San Francisco de Quito

Quito, Ecuador

Capacitance measurement on SION transistors (Use of laboratory equipment to measure on waffers)

Parameters extraction with MatLab

Redaction of a publication for the ROPEC 2017 ( Mobility extraction for 24-nm-channel length n-MOS using the RFCV technique: Effect of the fabrication process )

01/2018 – 02/2018

Solar Panel Optical Default Detection Project

Airbus defense and space

Toulouse, France

Designing a portable unit able to detect default on a 3 layer solar panel Project management (Gantt Chart, WBS, Cost evaluation, Bill of materials)

Design of an ergonomic and practical mechanical design 03/2018 – Present

FPGA Engineer

Elsys-Design

Toulouse, France

Elsys-Design is a service company, which provide smart solutions in the field of embedded systems

Verification of a Spacewire IP for a client (Thales alenia Space) Currently in a 6 months mission with SmarDTV to provide help in Hardware design development

Project management in order to respect the deadlines required by the clients

Adaptability to the method of the different clients EDUCATION

09/2014 – 09/2015

Generalistic engineering, 1st year of Master degree ISAE-SUPAERO

Toulouse, France

Aeronautics Project Management

09/2015 – 09/2018

Electronics and signal processing, Master degree

INP-ENSEEIHT

Toulouse, France

Digital and Analogic electronics

(FPGA, SoC, IC)

Radio Frequencies (Transmission

lines, Antennas, Optoelectronics)

Signal Processing (Digital,

analogic)

Project Management (Gantt

Chart, WBS, Cost evaluation)

SKILLS

Electronics VHDL Gantt Project

Microsoft office Verilog

SystemVerilog C Linux ISE

Pspice ADS Cadence

MatLab FPGA μBlaze

Project Management

PERSONAL PROJECTS

FPGA synthesizer (09/2018 – Present)

Development of a music synthesizer in VHDL

in order to place it on a FPGA

Music Production (10/2016 – Present)

Electronic music production on a dedicated

software (Ableton live)

ACHIEVEMENTS

President of the futsal club of ISAE-

SUPAERO (09/2014 – 09/2015)

Organization of trainings and matches

Vice-President of LaCassette in INP-

ENSEEIHT (09/2016 – 09/2017)

Electronic music club of INP-ENSEEIHT

LANGUAGES

French

English

Spanish

Turkish

INTERESTS

Running Football Travelling

Discovering Music

New technologies

Achievements/Tasks

Achievements/Tasks

Achievements/Tasks

Courses

Courses



Contact this candidate