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Engineer Design

Location:
Woodbridge, Ontario, Canada
Posted:
September 10, 2018

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Resume:

EVAN PANG

Home : 647-***-****

*** ******** **** ****,

Vaughan, On L4H 1H9 ac6zx6@r.postjobfree.com Cell : 416-***-**** EXPERIENCED HARDWARE DESIGN ENGINEER

Dedicated professional electronic hardware designer with over 20 years hardware design experience in embedded system application, especially in high speed and analog mixed signal design. STRENGTHS

- Embedded product concept and architecture design, draw out block diagram for customer review;

- Key components select in design after reviewing the components spec; Design and PCB layout skill:

- Schematic design with EDA tools in Mentor (PADS Logic), Cadence (Orcad), Altium(AD18);

- Board level design, hi-speed digital and analog mixed circuits design for electronic products;

- PCB layout design with EDA tools in Mentor (PADS Layout), Cadence (Allegro), Altium(AD18);

- Rigid PCB, Flex PCB, HDI PCB, Flex-Rigid PCB design;

- PCB stack-up design by Polar SI9000 for impedance control by using proper Prepreg/Core; Simulation skill:

- Design Simulation with EDA tools in Mentor (Hyperlynx), ANSOFT;

- LineSim for predesign simulation and make decision for the PCB stack-up and impedance control;

- BoardSim for PCB layout design simulation, made decision for PCB trace topology, termination and impedance control;

- Multi-board Simulation for crosstalk by using interconnector MMTL model;

- EMC simulation for multi PCBs by using keysight EDA tools;

- DDR2/3 timing simulation for optimizing the setup/hold time of CLK/DQS/DQ;

- Power Integrate simulation for optimizing the PDN;

- Thermal simulation by using Mentor FloTHERM;

Firmware development skill:

- Understand Linux and Android structure;

- C++ coding design for MCU;

- Verilog design for CPLD and FPGA;

Electronic circuitry design skill

- Used TI, Qualcomm, MTK, Freescale, microchip, Atmel, NXP, Allwinner CPU/MCU in design;

- Understand the structure of Cortex-A, Cortex-M serial CPU, also familiar with PIC, AVR MCU

- Understand protocol of SDRAM, DDR2/3, LPDDR3, and design validation.

- Serializer/Deserializer (SerDes) interface protocol and design; (up to 3GHz)

- NAND, NOR flash and MMC/SD interface protocol and design;

- UART, USB2.0, RS-232, RS-422, I2C, SPI, CAN bus interface protocol and design;

- PCI-e, USB3.0, SATA2.0 high speed interface protocol and design;

- GMII/RGMII/SGMII interface protocol and design;

- AC-DC, DC-DC Regulator, multi-phased DC-DC controller, Ultra low noise and high PSRR LDO, EMI filter design for power Integrity and EMC;

- DP, HDMI, MIPI-DSI, RGB, MCU mode) design;

- Camera MIPI-CSI interface protocol and design, good at camera 3A tuning;

- Audio CODEC interface protocol and design;

- ADC/DAC design, expert in noise reduction;

- RF design for WIFI, BLUETOOTH, Zigbee, RFID, Lora, GPS; Certification and tools skill

- CE, UL & FCC certification, trouble shooting for EMI, ESD and high pot test;

- Design for Manufacturability (DFM) and Design for Testability (DFT) knowledge and experience;

- Good at using Oscilloscope, logic analyzer, Spectrum Analyzer, Network Analyzer in trouble shooting;

- Strong trouble shooting and analysis skill for prototype debugging, good at hand soldering skill. WORK EXPERIENCE

IENSO INC, (RICHMOND HILL, ON)

Senior Hardware Design Engineer (HW team leader) 2012.11-2018.8

- Architecture and system level design for customer project;

- EVM kits verify, design interface board for EVM kits;

- Board level design and components select, PCB layout;

- Select and setup laboratory equipment for hardware design team;

- Prototype trouble shooting and EMC improvement, CE/FCC certification ;

- Transfer project to manufacturer;

- A team work with firmware engineer, FPGA engineer, mechanical engineer.

- design project list:

Race keeper HDX2; (TI DM8168)

http://www.race-keeper.com/hdx2/

Invixium Merge / Touch / Titan (TI AM3354, Snapdragon 820) http://www.invixium.com/

Bublcam; (TI DM368+Altera Cyclone IV)

http://bublcam.com/the-technology/hardware/

Uniprint VPAD (Freescale i.MX35)

https://www.uniprint.net/files/documents/vPad-FactSheet-web.pdf

C-COM satellite controller (PIC16)

http://www.c-

comsat.com/index.php?mact=Album,m5,default,1&m5albumid=21&m5returnid=205&page=205

&hl=en_US

DNG camera (TI DM8148+CCD)

http://www.digitalbolex.com/

Tamago 3D camera (Snapdragon 810)

http://www.tamaggo.com/en

ADAMSON SYSTEMS ENGINEERING (PORT PERRY, ON)

Senior Hardware Design Engineer (contractor) 2012.3-2012.11

TI OMAP4(4460) CPU board schematics design and PCB layout;

Class D Amplifier (1600W) PCB layout;

ZVS power supply board (1600W) PCB layout;

Transfer design documents to manufacturing department;

Release validation plan and hardware spec documents; GE Digital Energy (MARKHAM, ON)

Hardware Design Engineer (contractor) 2011.6-2012.3

Schematic design and components select.

LineSim for topology design and termination design for Signal Integrate.

PCB stack-up design, components placement, and PCB layout.

BoardSim for Signal Integrate and crosstalk.

PowerSim for Power Integrate.

DDRx Simulation for DDR2 SI and timing spec match.

Create BOM, Gerber, and assembly drawing and transfer to manufacturing.

Prepare hardware spec to Software team, prepare validation test plan for testing team.

Prototype trouble shooting, finish functional test.

Using proper equipment test the prototype according to hardware test plan, finish test report.

A team work with component engineer, mechanical engineer, testing engineer, PCB layout engineer, FPGA engineer and firmware engineer.

Project list: Universal Relay CPU board and daughter board. ANDA NETWORKS, INC. (SHENZHEN, CHINA)

Senior Hardware Engineer 2006.4-2010.6

Design project meeting review, make decision for hardware spec.

Board level design, related components datasheet review and qualification, schematic design, generate netlist and design spec.

Critical components placement with PCB layout team to design, critical trace design for PCB.

Board level simulation for signal integrity and EMC, BOM and gerber created and release.

Trouble shooting for the manufacturing problems during NPI and MP, find out the root cause, decision made to solve the problems.

Ensured designed product to be complied with manufacturing process via process qualification and to meet EMC requirement during product development phases.

Engineering prototypes debug and trouble shooting by using proper equipments.

Technical support for production of EMC certification.

Prepared engineering spec and documents.

Provided technical support to purchasing dept. for cost down and to shorten the components lead time.

Provided product/manufacturing training to the team and CM's engineer.

Managed a small team to finish hardware engineering job.

Project list: Anda EE serials ATM routers for Bell-Canada, AT&T, Verizon; Anda ER serials ATM routers for British Telecom; 10G SDH, SONET routers for Ciena. WONG 'S ELECTRONIC COMPANY. (SHENZHEN, CHINA)

Senior Hardware Engineer 2000-2006

Board level design, related components datasheet review and qualification, schematic design, aided PCB layout team to design, board level simulation for signal integrity and EMC, BOM created and release.

Checked and ensured designed products are applicable for manufacturing process and environment.

Transfer NPI models to DVT and MP build, including BOM/drawing review, manufacturing assembly/test instruction preparation.

Provided professional opinion for fixture/tools set up in production line.

Engineering samples debug and trouble shooting.

Project list: VOIP routers for NTT; GE-PON ONU for KDDI, wireless routers for NTT. PCCHIPS COMPUTER GROUP(SHENZHEN, CHINA)

Electronics Design Engineer 1995-2000

Design computer VGA card, Mother board and Audio card. EDUCATION & TRAINING

Bachelor of Electronics and Engineering - Xi'an Jiaotong University, China, 1991-1995 LANGUAGES

English, Cantonese, Mandarin.



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