HYOUNGIL KIM
Dallas, TX-***** Mail: ********@*****.***
LinkedIn: https://www.linkedin.com/in/khiworld/ Cell 254-***-****
SUMMARY
To obtain opportunity in electrical engineering, preferably in RF design and verification, utilizing solid academic knowledge, rich project experiences, problem solving and team communication skills.
TECHNICAL SKILLS
Tools & Utilities: ADS, Cadence Virtuoso, FEKO, HFSS, MATLAB, AWR Microwave Office,
AWR Axiem, Altium Designer
Hardware Tools: Vector Network Analyzers, Spectrum Analyzer, Oscilloscope, Signal Generator, Calibration kit, Power Meter
RF Design &Test Parameters: RF transceiver architecture, Noise Figure, P1dB, IP3, VSWR, Return loss, Impedance matching, Smith chart, S-Parameters, Sensitivity, Probe Measurements of Resistance/Capacitance
Programming Languages: C, C++, LabView
ACADEMIC PROJECTS
Q-based design of an LNA (2017)
Analyzed and designed single stage inductively source degenerated cascode LNA at 1.84GHz
The amplifier was designed for a low Noise Figure of <1.8 dB, Gain > 15dB, IIP3(input) >- 10dBM and Return loss <10 dB at 1.84GHz
Using AWR Microwave Office and Cadence Virtuoso to optimize the trade-off between noise figure, gain, bandwidth, stability and return loss
Design, Simulation, Milling and Testing of Passive RF & Microwave Components (2017)
Passive Design: MMIC filter, Microstrip Resonators, Microstrip 3-dB Wilkinson power divider, Edge Coupled Directional coupler, Butterworth low-pass filter, Chebyshev 0.5 dB ripple low-pass microstrip filter
Performed EM Simulation (AXIEM), Tested circuit performances in the lab, compared predicted and measured specifications
Cascade Two-Stage Low Noise Amplifier Design using the NEC 710 Low Noise Transistor (2017)
Designed two-stage Low Noise Amplifier (LNA) with Input, Output and Inter-stage matching networks and simulated in AWR
The amplifier was designed for a low Noise Figure of <2 dB, Gain >18dB & Return loss<10 dB at 10GHz
Obtained gain of 20.8 dB, NF of 1.96dB, BW3dB of 3.389 GHz and BW20dB of 5.923GHz and unconditional stable.
EDUCATION
Master of Science, Electrical Engineering Aug 2016 - May 2018
University of Texas at Dallas
GPA: 3.455/4.0
Bachelor of Science, Electrical Engineering Aug 2013 - Aug 2016
University of Texas at Dallas
GPA: 3.5/4.0