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Design Engineering

Location:
Toronto, Ontario, Canada
Posted:
August 31, 2018

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Resume:

Srinidhi Balasubrahmanya

A Master’s student at University of Toronto, interests include the Design and Layout of Analog and Mixed Signal Circuits.

Education

Completed M.Eng in ECE, University of Toronto, Toronto

Group: Electronics

Program Project: Imager Project Supervisor: Prof. Roman Genov

Low-Voltage Differential Signalling on LFoundry 110nm technology

Design and Layout of Mixed Signal functional blocks for Imager Sensor

Design was taped-out on LFoundry 110nm and XFAB 180nm nodes in March 2018

Projects in Grad Courses

Advanced Analog Circuits Prof. Trevor Caldwell Winter 2018

14-bit resolution Delta Sigma ADC

MOD-3, 9-level quantizer, OSR=32, ’CRFB’ architecture

Analog Circuits Design I Prof. Anthony Chan Carusone Fall 2017

Two stage amplifiers and Folded Cascode Fully Differential Amplifiers

Design and Characterization of StrongARM latch

Ring Oscillator controlled by Voltage Regulator and Behavioural Simulation of PLL

High Frequency Integrated Circuits Prof. Sorin P Voinigescu Winter 2017

Power Amplifier

Low Noise Amplifier

Voltage Controlled Oscillator

Technical Management of IC Design Prof. Kostas Pagiamtzis Winter 2017

Behavioural Simulation of SRAM and Transistorized design of the functional blocks

Optimization over corners, mismatches and Leakage

VLSI Design Methodology Prof. Roman Genov Fall 2016

Design and layout of Dual Slope ADC

Design and Layout of 4-bit multiplier

Design and Layout of Decoder for Optimum Performance

FPGA Architecture Prof. Vaughn Betz Fall 2016

Pipelined and Resource Shared Quadratic Expression

50th order FIR Filter - Verilog RTL vs C on DSP

RAM mapper - Memory mapping on FPGA

FPGA Routing Architecture - VPR tool

Previous Education

Bachelor of Engineering, BMSCE, Visvesvaraya Technological University, India 2012 - 16

Program Project: Implementation of Decimation Filter with the Design of a Novel multiplier

Academic performance: GPA of 9.5 on a scale of 10

Personal Data

Address: McCaul St, Toronto - ON M5T 2W9

Phone: +1-647-***-****

email: ac6v1y@r.postjobfree.com

ac6v1y@r.postjobfree.com

Co-curricular Activities

1. Finished top 100 nationwide in IEEE Xtreme 8.0 - a 24-hour coding competition

2. Co-authored 2 papers published in regional journals in Undergraduate

3. Implemented IOT solution for staff-student communication in undergraduate

Computer Tools

• Strong knowledge in Cadence

• Experience working with MATLAB and Simulink

• Good exposure in Quartus - ModelSim, Xilinx CAD Tools

Volunteer Work

• Past VP, Finance of Indian Grad Students Association, a student body under UTGSU

• Past Executive Board members of IEEE Student Chapter, Bengaluru Regional Section for

2014-15

• Past Executive members of the Fine-Arts Team in Undergraduate 2014-16

Interests

Photography

Soccer

Volleyball - Vice captain of High School team

Drawing

Cooking

Reference

Prof. Roman Genov

Dept. of Electrical and Computer Engineering

University of Toronto

email: ac6v1y@r.postjobfree.com

Website: http://www.eecg.toronto.edu/~roman/



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